diff -upr --new-file binutils-2.9.5.0.41/ChangeLog binutils-2.9.5.0.42/ChangeLog --- binutils-2.9.5.0.41/ChangeLog Sun Apr 23 09:39:40 2000 +++ binutils-2.9.5.0.42/ChangeLog Fri May 12 08:02:59 2000 @@ -1,3 +1,12 @@ +Wed May 10 21:26:51 2000 Jim Wilson + + * configure.in (ia64*-*-elf*): Add gdb and friends to noconfigdirs. + +2000-05-08 Eli Zaretskii + + * djunpack.bat: Change the Sed script to replace @V@ in fnchange.lst + with the version name. + 2000-04-23 Eli Zaretskii * djunpack.bat: New file. diff -upr --new-file binutils-2.9.5.0.41/ChangeLog.linux binutils-2.9.5.0.42/ChangeLog.linux --- binutils-2.9.5.0.41/ChangeLog.linux Fri Feb 25 13:39:22 2000 +++ binutils-2.9.5.0.42/ChangeLog.linux Fri May 12 08:11:26 2000 @@ -1,3 +1,8 @@ +2000-05-08 Horst von Brand + + * binutils.spec.in: Also support i486, i586 and i686. + Pass RPM_OPT_FLAGS to configure. + Fri Feb 18 18:27:56 2000 H.J. Lu * binutils.spec.in: Use /usr/bin/getconf to detect the number diff -upr --new-file binutils-2.9.5.0.41/bfd/ChangeLog binutils-2.9.5.0.42/bfd/ChangeLog --- binutils-2.9.5.0.41/bfd/ChangeLog Tue May 2 10:58:37 2000 +++ binutils-2.9.5.0.42/bfd/ChangeLog Fri May 12 09:20:11 2000 @@ -1,3 +1,89 @@ +2000-05-12 Alan Modra + + * targets.c (bfd_target_vector): #ifdef BFD64 rs6000coff64_vec + + * peigen.c (pe_print_idata): Look for .idata section and print + info even if data directory has zero entries. Read idata section + starting from dataoff, and adjust all data offsets to suit. Cast + all bfd_vma vars to unsigned long before passing to fprintf. + * peigen.c (pe_print_edata): Similarly, look for .edata section + and print info even if data directory has zero entries. Cast + all bfd_vma vars to unsigned long before passing to fprintf. + + From Szabolcs Szakacsits + * peigen.c (pe_print_idata): Use bfd_section_size rather than data + directory size which may be bogus. + * peigen.c (pe_print_edata): Similarly. + +2000-05-09 Alan Modra + + * elf.c (bfd_section_from_shdr): Don't set use_rela_p if rela + section is empty. + (copy_private_bfd_data): Allow for space possibly taken up by elf + headers when calculating segment physical address from lma. + +2000-05-08 Alan Modra + + * versados.c (versados_scan): Init stringlen and pass_2_done. + + * trad-core.c (trad_unix_core_file_p): Return + bfd_error_wrong_format rather than bfd_error_file_truncated. + + * peigen.c (_bfd_pei_swap_aouthdr_out): Pass ImageBase to + add_data_entry. DataDirectory virtual address is relative. + (pe_print_idata): Account for relative DataDirectory virtual + addresses. Don't trash datasize inside POWERPC_LE_PE code. + (pe_print_edata): Similarly. + + From Szabolcs Szakacsits + * peigen.c (dir_names): Add Delay Import Directory. + (pe_print_idata): Always search for bfd section containing + idata address rather than looking up section name. Print this + section name rather than .idata. + (pe_print_edata): Similarly. Also print some fields as %08lx. + (_bfd_pe_print_private_bfd_data_common): Print Reserved1 field as + Win32Version. + +Fri May 5 20:44:40 2000 Clinton Popetz + + * xcoff.h: Rename to xcoff-target.h + * Makefile.am: Change all instances of xcoff.h to xcoff-target.h + * coff-rs6000.c: Ditto. + * coff64-rs6000.c: Ditto. + * coff-pmac.c: Ditto. + * Makefile.in: Regenerate. + +Fri May 5 16:51:03 2000 Clinton Popetz + + * coffcode.h (coff_set_arch_mach_hook, coff_set_flags): + Change U802TOC64MAGIC to U803XTOCMAGIC. + +2000-05-04 Michael Snyder + + * elf.c (bfd_elf_get_arch_size): New function, return 32 | 64 | -1. + * bfd-in.h: Prototype bfd_elf_get_arch_size. + * bfd-in2.h: Prototype bfd_elf_get_arch_size. + +2000-05-04 Alan Modra + + * libhppa.h (HPPA_R_CONSTANT): Cast argument to bfd_signed_vma. + +2000-05-03 Martin v. Löwis + + * elflink.h (elf_link_add_object_symbols): Reset dynindx for + hidden and internal symbols. + (elf_fix_symbol_flags): Clear NEEDS_PLT for symbols with + visibility. + * elflink.c (_bfd_elf_link_record_dynamic_symbol): Do not + assign a PLT or GOT entry to symbols with hidden and + internal visibility. + +2000-05-03 Mark Elbrecht + + * bfd/coff-go32.c (COFF_SECTION_ALIGNMENT_ENTRIES): Add entry for + the .bss section. + * bfd/coff-stgo32.c (COFF_SECTION_ALIGNMENT_ENTRIES): Likewise. + 2000-05-02 H.J. Lu * elf.c (prep_headers): USe ELFOSABI_NONE instead of diff -upr --new-file binutils-2.9.5.0.41/bfd/ChangeLog.linux binutils-2.9.5.0.42/bfd/ChangeLog.linux --- binutils-2.9.5.0.41/bfd/ChangeLog.linux Tue May 2 10:23:17 2000 +++ binutils-2.9.5.0.42/bfd/ChangeLog.linux Fri May 12 08:11:29 2000 @@ -1,13 +1,3 @@ -2000-05-01 Martin v. Löwis - - * elflink.h (elf_link_add_object_symbols): Reset dynindx for - hidden and internal symbols. - (elf_fix_symbol_flags): Clear NEEDS_PLT for symbols with - visibility. - * elflink.c (_bfd_elf_link_record_dynamic_symbol): Do not - assign a PLT or GOT entry to symbols with hidden and - internal visibility. - Thu Jan 13 13:29:40 2000 H.J. Lu * configure.in (AC_OUTPUT): Add ../binutils.spec. diff -upr --new-file binutils-2.9.5.0.41/bfd/Makefile.am binutils-2.9.5.0.42/bfd/Makefile.am --- binutils-2.9.5.0.41/bfd/Makefile.am Tue May 2 10:23:17 2000 +++ binutils-2.9.5.0.42/bfd/Makefile.am Fri May 12 08:11:30 2000 @@ -464,7 +464,7 @@ SOURCE_HFILES = \ elfcode.h elfcore.h elflink.h freebsd.h genlink.h go32stub.h \ hppa_stubs.h libaout.h libbfd.h libcoff.h libecoff.h libhppa.h \ libieee.h libnlm.h liboasys.h libpei.h netbsd.h nlm-target.h \ - nlmcode.h nlmswap.h ns32k.h peicode.h som.h vms.h xcoff.h + nlmcode.h nlmswap.h ns32k.h peicode.h som.h vms.h xcoff-target.h HFILES = \ elf32-target.h elf64-target.h targmatch.h \ @@ -805,10 +805,10 @@ coff-mips.lo: coff-mips.c $(INCDIR)/bfdl ecoffswap.h coff-pmac.lo: coff-pmac.c $(INCDIR)/coff/internal.h \ $(INCDIR)/coff/rs6000.h libcoff.h $(INCDIR)/bfdlink.h \ - xcoff.h coffcode.h coffswap.h + xcoff-target.h coffcode.h coffswap.h coff-rs6000.lo: coff-rs6000.c $(INCDIR)/coff/internal.h \ $(INCDIR)/coff/rs6000.h libcoff.h $(INCDIR)/bfdlink.h \ - xcoff.h coffcode.h coffswap.h + xcoff-target.h coffcode.h coffswap.h coff-sh.lo: coff-sh.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/sh.h \ $(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h coff-sparc.lo: coff-sparc.c $(INCDIR)/coff/sparc.h \ @@ -1110,7 +1110,7 @@ coff-alpha.lo: coff-alpha.c $(INCDIR)/bf libecoff.h coffswap.h ecoffswap.h coff64-rs6000.lo: coff64-rs6000.c $(INCDIR)/coff/internal.h \ $(INCDIR)/coff/rs6k64.h libcoff.h $(INCDIR)/bfdlink.h \ - xcoff.h coffcode.h coffswap.h + xcoff-target.h coffcode.h coffswap.h demo64.lo: demo64.c aoutf1.h $(INCDIR)/aout/sun4.h \ libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h \ $(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def $(INCDIR)/aout/ar.h \ diff -upr --new-file binutils-2.9.5.0.41/bfd/Makefile.in binutils-2.9.5.0.42/bfd/Makefile.in --- binutils-2.9.5.0.41/bfd/Makefile.in Tue May 2 10:23:17 2000 +++ binutils-2.9.5.0.42/bfd/Makefile.in Fri May 12 08:11:30 2000 @@ -587,7 +587,7 @@ SOURCE_HFILES = \ elfcode.h elfcore.h elflink.h freebsd.h genlink.h go32stub.h \ hppa_stubs.h libaout.h libbfd.h libcoff.h libecoff.h libhppa.h \ libieee.h libnlm.h liboasys.h libpei.h netbsd.h nlm-target.h \ - nlmcode.h nlmswap.h ns32k.h peicode.h som.h vms.h xcoff.h + nlmcode.h nlmswap.h ns32k.h peicode.h som.h vms.h xcoff-target.h HFILES = \ @@ -1333,10 +1333,10 @@ coff-mips.lo: coff-mips.c $(INCDIR)/bfdl ecoffswap.h coff-pmac.lo: coff-pmac.c $(INCDIR)/coff/internal.h \ $(INCDIR)/coff/rs6000.h libcoff.h $(INCDIR)/bfdlink.h \ - xcoff.h coffcode.h coffswap.h + xcoff-target.h coffcode.h coffswap.h coff-rs6000.lo: coff-rs6000.c $(INCDIR)/coff/internal.h \ $(INCDIR)/coff/rs6000.h libcoff.h $(INCDIR)/bfdlink.h \ - xcoff.h coffcode.h coffswap.h + xcoff-target.h coffcode.h coffswap.h coff-sh.lo: coff-sh.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/sh.h \ $(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h coff-sparc.lo: coff-sparc.c $(INCDIR)/coff/sparc.h \ @@ -1638,7 +1638,7 @@ coff-alpha.lo: coff-alpha.c $(INCDIR)/bf libecoff.h coffswap.h ecoffswap.h coff64-rs6000.lo: coff64-rs6000.c $(INCDIR)/coff/internal.h \ $(INCDIR)/coff/rs6k64.h libcoff.h $(INCDIR)/bfdlink.h \ - xcoff.h coffcode.h coffswap.h + xcoff-target.h coffcode.h coffswap.h demo64.lo: demo64.c aoutf1.h $(INCDIR)/aout/sun4.h \ libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h \ $(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def $(INCDIR)/aout/ar.h \ diff -upr --new-file binutils-2.9.5.0.41/bfd/bfd-in.h binutils-2.9.5.0.42/bfd/bfd-in.h --- binutils-2.9.5.0.41/bfd/bfd-in.h Tue May 2 10:23:17 2000 +++ binutils-2.9.5.0.42/bfd/bfd-in.h Fri May 12 08:11:30 2000 @@ -640,6 +640,9 @@ extern long bfd_get_elf_phdr_upper_bound error occurs; bfd_get_error will return an appropriate code. */ extern int bfd_get_elf_phdrs PARAMS ((bfd *abfd, void *phdrs)); +/* Return the arch_size field of an elf bfd, or -1 if not elf. */ +extern int bfd_elf_get_arch_size PARAMS ((bfd *)); + /* SunOS shared library support routines for the linker. */ extern struct bfd_link_needed_list *bfd_sunos_get_needed_list diff -upr --new-file binutils-2.9.5.0.41/bfd/bfd-in2.h binutils-2.9.5.0.42/bfd/bfd-in2.h --- binutils-2.9.5.0.41/bfd/bfd-in2.h Tue May 2 10:23:17 2000 +++ binutils-2.9.5.0.42/bfd/bfd-in2.h Fri May 12 08:11:30 2000 @@ -640,6 +640,9 @@ extern long bfd_get_elf_phdr_upper_bound error occurs; bfd_get_error will return an appropriate code. */ extern int bfd_get_elf_phdrs PARAMS ((bfd *abfd, void *phdrs)); +/* Return the arch_size field of an elf bfd, or -1 if not elf. */ +extern int bfd_elf_get_arch_size PARAMS ((bfd *)); + /* SunOS shared library support routines for the linker. */ extern struct bfd_link_needed_list *bfd_sunos_get_needed_list diff -upr --new-file binutils-2.9.5.0.41/bfd/coff-go32.c binutils-2.9.5.0.42/bfd/coff-go32.c --- binutils-2.9.5.0.41/bfd/coff-go32.c Sat Feb 19 11:21:28 2000 +++ binutils-2.9.5.0.42/bfd/coff-go32.c Fri May 12 08:03:20 2000 @@ -29,6 +29,8 @@ Foundation, Inc., 59 Temple Place - Suit COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 4 }, \ { COFF_SECTION_NAME_EXACT_MATCH (".text"), \ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 4 }, \ +{ COFF_SECTION_NAME_EXACT_MATCH (".bss"), \ + COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 4 }, \ { COFF_SECTION_NAME_PARTIAL_MATCH (".gnu.linkonce.d"), \ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 4 }, \ { COFF_SECTION_NAME_PARTIAL_MATCH (".gnu.linkonce.t"), \ diff -upr --new-file binutils-2.9.5.0.41/bfd/coff-pmac.c binutils-2.9.5.0.42/bfd/coff-pmac.c --- binutils-2.9.5.0.41/bfd/coff-pmac.c Tue May 2 10:06:56 2000 +++ binutils-2.9.5.0.42/bfd/coff-pmac.c Fri May 12 08:03:22 2000 @@ -31,6 +31,6 @@ Foundation, Inc., 59 Temple Place - Suit #include "coff/internal.h" #include "coff/rs6000.h" #include "libcoff.h" -#include "xcoff.h" +#include "xcoff-target.h" diff -upr --new-file binutils-2.9.5.0.41/bfd/coff-rs6000.c binutils-2.9.5.0.42/bfd/coff-rs6000.c --- binutils-2.9.5.0.41/bfd/coff-rs6000.c Tue May 2 10:06:57 2000 +++ binutils-2.9.5.0.42/bfd/coff-rs6000.c Fri May 12 08:03:23 2000 @@ -35,7 +35,7 @@ Foundation, Inc., 59 Temple Place - Suit #include "libcoff.h" #define TARGET_NAME "aixcoff-rs6000" #define TARGET_SYM rs6000coff_vec -#include "xcoff.h" +#include "xcoff-target.h" /* The main body of code is in coffcode.h. */ diff -upr --new-file binutils-2.9.5.0.41/bfd/coff-stgo32.c binutils-2.9.5.0.42/bfd/coff-stgo32.c --- binutils-2.9.5.0.41/bfd/coff-stgo32.c Mon Aug 9 09:21:57 1999 +++ binutils-2.9.5.0.42/bfd/coff-stgo32.c Fri May 12 08:03:23 2000 @@ -46,6 +46,8 @@ { COFF_SECTION_NAME_EXACT_MATCH (".data"), \ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 4 }, \ { COFF_SECTION_NAME_EXACT_MATCH (".text"), \ + COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 4 }, \ +{ COFF_SECTION_NAME_EXACT_MATCH (".bss"), \ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 4 } #include "bfd.h" diff -upr --new-file binutils-2.9.5.0.41/bfd/coff64-rs6000.c binutils-2.9.5.0.42/bfd/coff64-rs6000.c --- binutils-2.9.5.0.41/bfd/coff64-rs6000.c Tue May 2 10:07:39 2000 +++ binutils-2.9.5.0.42/bfd/coff64-rs6000.c Fri May 12 08:03:53 2000 @@ -356,5 +356,5 @@ end: #define TARGET_NAME "aixcoff64-rs6000" #define TARGET_SYM rs6000coff64_vec -#include "xcoff.h" +#include "xcoff-target.h" diff -upr --new-file binutils-2.9.5.0.41/bfd/coffcode.h binutils-2.9.5.0.42/bfd/coffcode.h --- binutils-2.9.5.0.41/bfd/coffcode.h Tue May 2 10:06:59 2000 +++ binutils-2.9.5.0.42/bfd/coffcode.h Fri May 12 08:03:24 2000 @@ -1910,7 +1910,7 @@ coff_set_arch_mach_hook (abfd, filehdr) #ifdef RS6000COFF_C #ifdef XCOFF64 - case U802TOC64MAGIC: + case U803XTOCMAGIC: #else case U802ROMAGIC: case U802WRMAGIC: @@ -2694,7 +2694,7 @@ coff_set_flags (abfd, magicp, flagsp) #endif #ifdef XCOFF64 if (bfd_get_mach (abfd) == 620 && !strncmp (abfd->xvec->name,"aix", 3)) - *magicp = U802TOC64MAGIC; + *magicp = U803XTOCMAGIC; else #else *magicp = U802TOCMAGIC; diff -upr --new-file binutils-2.9.5.0.41/bfd/configure binutils-2.9.5.0.42/bfd/configure --- binutils-2.9.5.0.41/bfd/configure Tue May 2 10:25:05 2000 +++ binutils-2.9.5.0.42/bfd/configure Fri May 12 08:12:11 2000 @@ -1063,7 +1063,7 @@ fi PACKAGE=bfd -VERSION=2.9.5.0.41 +VERSION=2.9.5.0.42 if test "`cd $srcdir && pwd`" != "`pwd`" && test -f $srcdir/config.status; then { echo "configure: error: source directory already configured; run "make distclean" there first" 1>&2; exit 1; } diff -upr --new-file binutils-2.9.5.0.41/bfd/configure.in binutils-2.9.5.0.42/bfd/configure.in --- binutils-2.9.5.0.41/bfd/configure.in Tue May 2 10:25:05 2000 +++ binutils-2.9.5.0.42/bfd/configure.in Fri May 12 08:12:11 2000 @@ -7,7 +7,7 @@ AC_INIT(libbfd.c) AC_CANONICAL_SYSTEM AC_ISC_POSIX -AM_INIT_AUTOMAKE(bfd, 2.9.5.0.41) +AM_INIT_AUTOMAKE(bfd, 2.9.5.0.42) dnl These must be called before AM_PROG_LIBTOOL, because it may want dnl to call AC_CHECK_PROG. diff -upr --new-file binutils-2.9.5.0.41/bfd/elf.c binutils-2.9.5.0.42/bfd/elf.c --- binutils-2.9.5.0.41/bfd/elf.c Tue May 2 11:02:46 2000 +++ binutils-2.9.5.0.42/bfd/elf.c Fri May 12 08:11:30 2000 @@ -1354,8 +1354,9 @@ bfd_section_from_shdr (abfd, shindex) target_sect->rel_filepos = hdr->sh_offset; /* In the section to which the relocations apply, mark whether its relocations are of the REL or RELA variety. */ - elf_section_data (target_sect)->use_rela_p - = (hdr->sh_type == SHT_RELA); + if (hdr->sh_size != 0) + elf_section_data (target_sect)->use_rela_p + = (hdr->sh_type == SHT_RELA); abfd->flags |= HAS_RELOC; return true; } @@ -1752,6 +1753,22 @@ elf_fake_sections (abfd, asect, failedpt *failedptr = true; } +/* Get elf arch size (32 / 64). + Returns -1 if not elf. */ + +int +bfd_elf_get_arch_size (abfd) + bfd *abfd; +{ + if (abfd->xvec->flavour != bfd_target_elf_flavour) + { + bfd_set_error (bfd_error_wrong_format); + return -1; + } + + return (get_elf_backend_data (abfd))->s->arch_size; +} + /* Assign all ELF section numbers. The dummy first section is handled here too. The link/info pointers for the standard section types are filled in here too, while we're at it. */ @@ -1764,7 +1781,6 @@ assign_section_numbers (abfd) asection *sec; unsigned int section_number; Elf_Internal_Shdr **i_shdrp; - struct elf_backend_data *bed = get_elf_backend_data (abfd); section_number = 1; @@ -1899,7 +1915,7 @@ assign_section_numbers (abfd) /* This is a .stab section. */ elf_section_data (s)->this_hdr.sh_entsize = - 4 + 2 * (bed->s->arch_size / 8); + 4 + 2 * bfd_elf_get_arch_size (abfd) / 8; } } break; @@ -3226,7 +3242,7 @@ prep_headers (abfd) i_ehdrp->e_machine = EM_NONE; break; case bfd_arch_sparc: - if (bed->s->arch_size == 64) + if (bfd_elf_get_arch_size (abfd) == 64) i_ehdrp->e_machine = EM_SPARCV9; else i_ehdrp->e_machine = EM_SPARC; @@ -3729,7 +3745,7 @@ copy_private_bfd_data (ibfd, obfd) more to do. */ isec = 0; - matching_lma = false; + matching_lma = 0; suggested_lma = 0; for (j = 0, s = ibfd->sections; s != NULL; s = s->next) @@ -3795,21 +3811,32 @@ copy_private_bfd_data (ibfd, obfd) free (sections); continue; } - else if (matching_lma != 0) - { - /* At least one section fits inside the current segment. - Keep it, but modify its physical address to match the - LMA of the first section that fitted. */ - - m->p_paddr = matching_lma; - } else { - /* None of the sections fitted inside the current segment. - Change the current segment's physical address to match - the LMA of the first section. */ + if (matching_lma != 0) + { + /* At least one section fits inside the current segment. + Keep it, but modify its physical address to match the + LMA of the first section that fitted. */ + + m->p_paddr = matching_lma; + } + else + { + /* None of the sections fitted inside the current segment. + Change the current segment's physical address to match + the LMA of the first section. */ + + m->p_paddr = suggested_lma; + } + + /* Offset the segment physical address from the lma to allow + for space taken up by elf headers. */ + if (m->includes_filehdr) + m->p_paddr -= iehdr->e_ehsize; - m->p_paddr = suggested_lma; + if (m->includes_phdrs) + m->p_paddr -= iehdr->e_phnum * iehdr->e_phentsize; } /* Step Three: Loop over the sections again, this time assigning @@ -3842,7 +3869,12 @@ copy_private_bfd_data (ibfd, obfd) { /* If the first section in a segment does not start at the beginning of the segment, then something is wrong. */ - if (os->lma != m->p_paddr) + if (os->lma != (m->p_paddr + + (m->includes_filehdr + ? iehdr->e_ehsize : 0) + + (m->includes_phdrs + ? iehdr->e_phnum * iehdr->e_phentsize + : 0))) abort (); } else diff -upr --new-file binutils-2.9.5.0.41/bfd/libhppa.h binutils-2.9.5.0.42/bfd/libhppa.h --- binutils-2.9.5.0.41/bfd/libhppa.h Tue May 2 10:07:25 2000 +++ binutils-2.9.5.0.42/bfd/libhppa.h Fri May 12 08:03:42 2000 @@ -156,7 +156,7 @@ enum hppa_reloc_expr_type_alt #define HPPA_R_ARG_RELOC(a) \ (((a) >> 22) & 0x3ff) #define HPPA_R_CONSTANT(a) \ - ((((int)(a)) << (BFD_ARCH_SIZE-22)) >> (BFD_ARCH_SIZE-22)) + ((((bfd_signed_vma)(a)) << (BFD_ARCH_SIZE-22)) >> (BFD_ARCH_SIZE-22)) #define HPPA_R_ADDEND(r, c) \ (((r) << 22) + ((c) & 0x3fffff)) #define HPPA_WIDE (0) /* PSW W-bit, need to check! FIXME */ diff -upr --new-file binutils-2.9.5.0.41/bfd/peigen.c binutils-2.9.5.0.42/bfd/peigen.c --- binutils-2.9.5.0.41/bfd/peigen.c Tue Apr 18 10:05:28 2000 +++ binutils-2.9.5.0.42/bfd/peigen.c Fri May 12 08:03:46 2000 @@ -1,5 +1,5 @@ /* Support for the generic parts of PE/PEI; the common executable parts. - Copyright 1995, 1996, 1997, 1998, 1999 Free Software Foundation, Inc. + Copyright 1995, 96, 97, 98, 99, 2000 Free Software Foundation, Inc. Written by Cygnus Solutions. This file is part of BFD, the Binary File Descriptor library. @@ -594,7 +594,7 @@ _bfd_pei_swap_aouthdr_out (abfd, in, out /* first null out all data directory entries .. */ memset (extra->DataDirectory, sizeof (extra->DataDirectory), 0); - add_data_entry (abfd, extra, 0, ".edata", 0); + add_data_entry (abfd, extra, 0, ".edata", ib); /* Don't call add_data_entry for .idata$2 or .idata$5. It's done in bfd_coff_final_link where all the required information is @@ -602,11 +602,11 @@ _bfd_pei_swap_aouthdr_out (abfd, in, out /* However, until other .idata fixes are made (pending patch), the entry for .idata is needed for backwards compatability. FIXME. */ - add_data_entry (abfd, extra, 1, ".idata" ,0); + add_data_entry (abfd, extra, 1, ".idata" , ib); - add_data_entry (abfd, extra, 2, ".rsrc" ,0); + add_data_entry (abfd, extra, 2, ".rsrc" , ib); - add_data_entry (abfd, extra, 3, ".pdata", 0); + add_data_entry (abfd, extra, 3, ".pdata", ib); /* For some reason, the virtual size (which is what's set by add_data_entry) for .reloc is not the same as the size recorded @@ -614,7 +614,7 @@ _bfd_pei_swap_aouthdr_out (abfd, in, out but since it's the best we've got, use it. It does do the right thing for .pdata. */ if (pe_data (abfd)->has_reloc_section) - add_data_entry (abfd, extra, 5, ".reloc", 0); + add_data_entry (abfd, extra, 5, ".reloc", ib); { asection *sec; @@ -1003,7 +1003,7 @@ static char * dir_names[IMAGE_NUMBEROF_D N_ ("Load Configuration Directory"), N_ ("Bound Import Directory"), N_ ("Import Address Table Directory"), - N_ ("Reserved"), + N_ ("Delay Import Directory"), N_ ("Reserved"), N_ ("Reserved") }; @@ -1024,63 +1024,61 @@ pe_print_idata (abfd, vfile) PTR vfile; { FILE *file = (FILE *) vfile; - bfd_byte *data = 0; - asection *section = bfd_get_section_by_name (abfd, ".idata"); - unsigned long adj; + bfd_byte *data; + asection *section; + bfd_signed_vma adj; #ifdef POWERPC_LE_PE asection *rel_section = bfd_get_section_by_name (abfd, ".reldata"); #endif - bfd_size_type datasize; + bfd_size_type datasize = 0; bfd_size_type dataoff; - bfd_size_type secsize; bfd_size_type i; int onaline = 20; pe_data_type *pe = pe_data (abfd); struct internal_extra_pe_aouthdr *extra = &pe->pe_opthdr; - if (section != NULL) + bfd_vma addr; + + addr = extra->DataDirectory[1].VirtualAddress; + + if (addr == 0 && extra->DataDirectory[1].Size == 0) { - datasize = bfd_section_size (abfd, section); - dataoff = 0; + /* Maybe the extra header isn't there. Look for the section. */ + section = bfd_get_section_by_name (abfd, ".idata"); + if (section == NULL) + return true; + addr = section->vma; + datasize = bfd_section_size (abfd, section); if (datasize == 0) return true; - - fprintf (file, _("\nThe import table is the .idata section\n")); } else { - /* idata buried in some other section: e.g. KERNEL32.DLL. */ - bfd_vma addr, size; - - addr = extra->DataDirectory[1].VirtualAddress; - size = extra->DataDirectory[1].Size; - - if (addr == 0 || size == 0) - return true; - + addr += extra->ImageBase; for (section = abfd->sections; section != NULL; section = section->next) { - if (addr >= section->vma - && addr < section->vma + bfd_section_size(abfd,section)) - break; + datasize = bfd_section_size (abfd, section); + if (addr >= section->vma && addr < section->vma + datasize) + break; } + if (section == NULL) { - fprintf (file, - _("\nThere is an import table, but the section containing it could not be found\n")); - return true; + fprintf (file, + _("\nThere is an import table, but the section containing it could not be found\n")); + return true; } + } - fprintf (file, _("\nThere is an import table in %s at 0x%lx\n"), - section->name, (unsigned long)addr); + fprintf (file, _("\nThere is an import table in %s at 0x%lx\n"), + section->name, (unsigned long) addr); - dataoff = addr - section->vma; - datasize = size; - } + dataoff = addr - section->vma; + datasize -= dataoff; #ifdef POWERPC_LE_PE if (rel_section != 0 && bfd_section_size (abfd, rel_section) != 0) @@ -1097,13 +1095,12 @@ pe_print_idata (abfd, vfile) bfd_vma start_address; bfd_byte *data = 0; int offset; + data = (bfd_byte *) bfd_malloc ((size_t) bfd_section_size (abfd, rel_section)); if (data == NULL && bfd_section_size (abfd, rel_section) != 0) return false; - datasize = bfd_section_size (abfd, rel_section); - bfd_get_section_contents (abfd, rel_section, (PTR) data, 0, @@ -1130,21 +1127,21 @@ pe_print_idata (abfd, vfile) #endif fprintf(file, - _("\nThe Import Tables (interpreted .idata section contents)\n")); + _("\nThe Import Tables (interpreted %s section contents)\n"), + section->name); fprintf(file, _(" vma: Hint Time Forward DLL First\n")); fprintf(file, _(" Table Stamp Chain Name Thunk\n")); - secsize = bfd_section_size (abfd, section); - data = (bfd_byte *) bfd_malloc (secsize); - if (data == NULL && secsize != 0) + data = (bfd_byte *) bfd_malloc (datasize); + if (data == NULL) return false; - if (! bfd_get_section_contents (abfd, section, (PTR) data, 0, secsize)) + if (! bfd_get_section_contents (abfd, section, (PTR) data, dataoff, datasize)) return false; - adj = - section->vma; + adj = section->vma - extra->ImageBase + dataoff; for (i = 0; i < datasize; i += onaline) { @@ -1157,40 +1154,39 @@ pe_print_idata (abfd, vfile) bfd_size_type j; char *dll; - fprintf (file, - " %08lx\t", - (unsigned long int) (i + section->vma + dataoff)); - + /* print (i + extra->DataDirectory[1].VirtualAddress) */ + fprintf (file, " %08lx\t", (unsigned long) (i + adj)); + if (i + 20 > datasize) { /* check stuff */ ; } - hint_addr = bfd_get_32 (abfd, data + i + dataoff); - time_stamp = bfd_get_32 (abfd, data + i + 4 + dataoff); - forward_chain = bfd_get_32 (abfd, data + i + 8 + dataoff); - dll_name = bfd_get_32 (abfd, data + i + 12 + dataoff); - first_thunk = bfd_get_32 (abfd, data + i + 16 + dataoff); + hint_addr = bfd_get_32 (abfd, data + i); + time_stamp = bfd_get_32 (abfd, data + i + 4); + forward_chain = bfd_get_32 (abfd, data + i + 8); + dll_name = bfd_get_32 (abfd, data + i + 12); + first_thunk = bfd_get_32 (abfd, data + i + 16); fprintf (file, "%08lx %08lx %08lx %08lx %08lx\n", - hint_addr, - time_stamp, - forward_chain, - dll_name, - first_thunk); + (unsigned long) hint_addr, + (unsigned long) time_stamp, + (unsigned long) forward_chain, + (unsigned long) dll_name, + (unsigned long) first_thunk); if (hint_addr == 0 && first_thunk == 0) break; - dll = (char *) data + dll_name - section->vma + dataoff; + dll = (char *) data + dll_name - adj; fprintf(file, _("\n\tDLL Name: %s\n"), dll); if (hint_addr != 0) { fprintf (file, _("\tvma: Hint/Ord Member-Name\n")); - idx = hint_addr + adj; + idx = hint_addr - adj; for (j = 0; j < datasize; j += 4) { @@ -1206,8 +1202,8 @@ pe_print_idata (abfd, vfile) int ordinal; char *member_name; - ordinal = bfd_get_16 (abfd, data + member + adj); - member_name = (char *) data + member + adj + 2; + ordinal = bfd_get_16 (abfd, data + member - adj); + member_name = (char *) data + member - adj + 2; fprintf (file, "\t%04lx\t %4d %s", member, ordinal, member_name); } @@ -1218,7 +1214,7 @@ pe_print_idata (abfd, vfile) && first_thunk != 0 && first_thunk != hint_addr) fprintf (file, "\t%04lx", - bfd_get_32 (abfd, data + first_thunk + adj + j)); + (long) bfd_get_32 (abfd, data + first_thunk - adj + j)); fprintf (file, "\n"); } @@ -1229,7 +1225,7 @@ pe_print_idata (abfd, vfile) int differ = 0; int idx2; - idx2 = first_thunk + adj; + idx2 = first_thunk - adj; for (j = 0; j < datasize; j += 4) { @@ -1262,10 +1258,12 @@ pe_print_idata (abfd, vfile) else { ordinal = bfd_get_16(abfd, - data + iat_member + adj); - member_name = (char *) data + iat_member + adj + 2; + data + iat_member - adj); + member_name = (char *) data + iat_member - adj + 2; fprintf(file, "\t%04lx\t %4d %s\n", - iat_member, ordinal, member_name); + (unsigned long) iat_member, + ordinal, + member_name); } } @@ -1294,14 +1292,14 @@ pe_print_edata (abfd, vfile) PTR vfile; { FILE *file = (FILE *) vfile; - bfd_byte *data = 0; - asection *section = bfd_get_section_by_name (abfd, ".edata"); + bfd_byte *data; + asection *section; - bfd_size_type datasize; + bfd_size_type datasize = 0; bfd_size_type dataoff; bfd_size_type i; - int adj; + bfd_signed_vma adj; struct EDT_type { long export_flags; /* reserved - should be zero */ @@ -1320,45 +1318,48 @@ pe_print_edata (abfd, vfile) pe_data_type *pe = pe_data (abfd); struct internal_extra_pe_aouthdr *extra = &pe->pe_opthdr; - if (section != NULL) + bfd_vma addr; + + addr = extra->DataDirectory[0].VirtualAddress; + + if (addr == 0 && extra->DataDirectory[0].Size == 0) { + /* Maybe the extra header isn't there. Look for the section. */ + section = bfd_get_section_by_name (abfd, ".edata"); + if (section == NULL) + return true; + + addr = section->vma; datasize = bfd_section_size (abfd, section); - dataoff = 0; - fprintf (file, _("\nThe export table is the .edata section\n")); + if (datasize == 0) + return true; } else { - /* edata is buried in some other section: e.g. NTDLL.DLL. */ - bfd_vma addr, size; - - addr = extra->DataDirectory[0].VirtualAddress; - size = extra->DataDirectory[0].Size; - - if (addr == 0 || size == 0) - return true; - + addr += extra->ImageBase; for (section = abfd->sections; section != NULL; section = section->next) { - if (addr >= section->vma - && addr < section->vma + bfd_section_size (abfd, section)) - break; + datasize = bfd_section_size (abfd, section); + if (addr >= section->vma && addr < section->vma + datasize) + break; } + if (section == NULL) { - fprintf (file, - _("\nThere is an export table, but the section containing it could not be found\n")); - return true; + fprintf (file, + _("\nThere is an export table, but the section containing it could not be found\n")); + return true; } + } - fprintf (file, _("\nThere is an export table in %s at 0x%lx\n"), - section->name, (unsigned long) addr); + fprintf (file, _("\nThere is an export table in %s at 0x%lx\n"), + section->name, (unsigned long) addr); - datasize = size; - dataoff = addr - section->vma; - } + dataoff = addr - section->vma; + datasize -= dataoff; data = (bfd_byte *) bfd_malloc (datasize); - if (data == NULL && datasize != 0) + if (data == NULL) return false; if (! bfd_get_section_contents (abfd, section, (PTR) data, dataoff, @@ -1378,11 +1379,12 @@ pe_print_edata (abfd, vfile) edt.npt_addr = bfd_get_32(abfd, data+32); edt.ot_addr = bfd_get_32(abfd, data+36); - adj = - (section->vma + dataoff); + adj = section->vma - extra->ImageBase + dataoff; /* Dump the EDT first first */ fprintf(file, - _("\nThe Export Tables (interpreted .edata section contents)\n\n")); + _("\nThe Export Tables (interpreted %s section contents)\n\n"), + section->name); fprintf(file, _("Export Flags \t\t\t%lx\n"), (unsigned long) edt.export_flags); @@ -1397,7 +1399,7 @@ pe_print_edata (abfd, vfile) _("Name \t\t\t\t")); fprintf_vma (file, edt.name); fprintf (file, - " %s\n", data + edt.name + adj); + " %s\n", data + edt.name - adj); fprintf(file, _("Ordinal Base \t\t\t%ld\n"), edt.base); @@ -1406,11 +1408,11 @@ pe_print_edata (abfd, vfile) _("Number in:\n")); fprintf(file, - _("\tExport Address Table \t\t%lx\n"), + _("\tExport Address Table \t\t%08lx\n"), edt.num_functions); fprintf(file, - _("\t[Name Pointer/Ordinal] Table\t%lu\n"), edt.num_names); + _("\t[Name Pointer/Ordinal] Table\t%08lx\n"), edt.num_names); fprintf(file, _("Table Addresses\n")); @@ -1448,7 +1450,7 @@ pe_print_edata (abfd, vfile) for (i = 0; i < edt.num_functions; ++i) { bfd_vma eat_member = bfd_get_32 (abfd, - data + edt.eat_addr + (i * 4) + adj); + data + edt.eat_addr + (i * 4) - adj); bfd_vma eat_actual = eat_member; bfd_vma edata_start = bfd_get_section_vma (abfd, section); bfd_vma edata_end = edata_start + datasize; @@ -1462,15 +1464,20 @@ pe_print_edata (abfd, vfile) /* Should locate a function descriptor */ fprintf (file, "\t[%4ld] +base[%4ld] %04lx %s -- %s\n", - (long) i, (long) (i + edt.base), eat_member, - _("Forwarder RVA"), data + eat_member + adj); + (long) i, + (long) (i + edt.base), + (unsigned long) eat_member, + _("Forwarder RVA"), + data + eat_member - adj); } else { /* Should locate a function descriptor in the reldata section */ fprintf (file, "\t[%4ld] +base[%4ld] %04lx %s\n", - (long) i, (long) (i + edt.base), eat_member, + (long) i, + (long) (i + edt.base), + (unsigned long) eat_member, _("Export RVA")); } } @@ -1485,14 +1492,14 @@ pe_print_edata (abfd, vfile) bfd_vma name_ptr = bfd_get_32(abfd, data + edt.npt_addr - + (i*4) + adj); + + (i*4) - adj); - char *name = (char *) data + name_ptr + adj; + char *name = (char *) data + name_ptr - adj; bfd_vma ord = bfd_get_16(abfd, data + edt.ot_addr - + (i*2) + adj); + + (i*2) - adj); fprintf(file, "\t[%4ld] %s\n", (long) ord, name); @@ -1711,7 +1718,7 @@ pe_print_reloc (abfd, vfile) fprintf (file, _("\nVirtual Address: %08lx Chunk size %ld (0x%lx) Number of fixups %ld\n"), - virtual_address, size, size, number); + (unsigned long) virtual_address, size, size, number); for (j = 0; j < number; ++j) { @@ -1791,7 +1798,7 @@ _bfd_pe_print_private_bfd_data_common (a fprintf (file,"MinorImageVersion\t%d\n", i->MinorImageVersion); fprintf (file,"MajorSubsystemVersion\t%d\n", i->MajorSubsystemVersion); fprintf (file,"MinorSubsystemVersion\t%d\n", i->MinorSubsystemVersion); - fprintf (file,"Reserved1\t\t%08lx\n", i->Reserved1); + fprintf (file,"Win32Version\t\t%08lx\n", i->Reserved1); fprintf (file,"SizeOfImage\t\t%08lx\n", i->SizeOfImage); fprintf (file,"SizeOfHeaders\t\t%08lx\n", i->SizeOfHeaders); fprintf (file,"CheckSum\t\t%08lx\n", i->CheckSum); diff -upr --new-file binutils-2.9.5.0.41/bfd/targets.c binutils-2.9.5.0.42/bfd/targets.c --- binutils-2.9.5.0.41/bfd/targets.c Tue May 2 10:23:17 2000 +++ binutils-2.9.5.0.42/bfd/targets.c Fri May 12 08:11:30 2000 @@ -866,7 +866,9 @@ const bfd_target * const bfd_target_vect &pmac_xcoff_vec, #endif &rs6000coff_vec, +#ifdef BFD64 &rs6000coff64_vec, +#endif &ppcboot_vec, &shcoff_vec, &shlcoff_vec, diff -upr --new-file binutils-2.9.5.0.41/bfd/trad-core.c binutils-2.9.5.0.42/bfd/trad-core.c --- binutils-2.9.5.0.41/bfd/trad-core.c Thu Feb 24 11:11:23 2000 +++ binutils-2.9.5.0.42/bfd/trad-core.c Fri May 12 08:03:49 2000 @@ -112,7 +112,7 @@ trad_unix_core_file_p (abfd) + u.u_ssize)) > (unsigned long) statbuf.st_size) { - bfd_set_error (bfd_error_file_truncated); + bfd_set_error (bfd_error_wrong_format); return 0; } #ifndef TRAD_CORE_ALLOW_ANY_EXTRA_SIZE diff -upr --new-file binutils-2.9.5.0.41/bfd/versados.c binutils-2.9.5.0.42/bfd/versados.c --- binutils-2.9.5.0.41/bfd/versados.c Mon Jul 19 09:13:25 1999 +++ binutils-2.9.5.0.42/bfd/versados.c Fri May 12 08:03:49 2000 @@ -1,5 +1,5 @@ /* BFD back-end for VERSAdos-E objects. - Copyright 1995, 96, 97, 98, 1999 Free Software Foundation, Inc. + Copyright 1995, 96, 97, 98, 99, 2000 Free Software Foundation, Inc. Written by Steve Chamberlain of Cygnus Support . Versados is a Motorola trademark. @@ -483,10 +483,12 @@ versados_scan (abfd) int j; int nsecs = 0; + VDATA (abfd)->stringlen = 0; VDATA (abfd)->nrefs = 0; VDATA (abfd)->ndefs = 0; VDATA (abfd)->ref_idx = 0; VDATA (abfd)->def_idx = 0; + VDATA (abfd)->pass_2_done = 0; while (loop) { diff -upr --new-file binutils-2.9.5.0.41/bfd/xcoff-target.h binutils-2.9.5.0.42/bfd/xcoff-target.h --- binutils-2.9.5.0.41/bfd/xcoff-target.h Wed Dec 31 16:00:00 1969 +++ binutils-2.9.5.0.42/bfd/xcoff-target.h Fri May 12 08:03:53 2000 @@ -0,0 +1,198 @@ +/* Common definitions for backends based on IBM RS/6000 "XCOFF64" files. + Copyright 2000 + Free Software Foundation, Inc. + Contributed by Cygnus Support. + +This file is part of BFD, the Binary File Descriptor library. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +/* Internalcoff.h and coffcode.h modify themselves based on this flag. */ +#define RS6000COFF_C 1 + +#define SELECT_RELOC(internal, howto) \ + { \ + internal.r_type = howto->type; \ + internal.r_size = \ + ((howto->complain_on_overflow == complain_overflow_signed \ + ? 0x80 \ + : 0) \ + | (howto->bitsize - 1)); \ + } + +#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (3) + +#define COFF_LONG_FILENAMES + +#define NO_COFF_SYMBOLS + +#define RTYPE2HOWTO(cache_ptr, dst) _bfd_xcoff_rtype2howto (cache_ptr, dst) + +#define coff_mkobject _bfd_xcoff_mkobject +#define coff_bfd_copy_private_bfd_data _bfd_xcoff_copy_private_bfd_data +#define coff_bfd_is_local_label_name _bfd_xcoff_is_local_label_name +#define coff_bfd_reloc_type_lookup _bfd_xcoff_reloc_type_lookup +#define coff_relocate_section _bfd_ppc_xcoff_relocate_section + +#define CORE_FILE_P _bfd_dummy_target + +#define coff_core_file_failing_command _bfd_nocore_core_file_failing_command +#define coff_core_file_failing_signal _bfd_nocore_core_file_failing_signal +#define coff_core_file_matches_executable_p \ + _bfd_nocore_core_file_matches_executable_p + +#ifdef AIX_CORE +#undef CORE_FILE_P +#define CORE_FILE_P rs6000coff_core_p +extern const bfd_target * rs6000coff_core_p (); +extern boolean rs6000coff_get_section_contents (); +extern boolean rs6000coff_core_file_matches_executable_p (); + +#undef coff_core_file_matches_executable_p +#define coff_core_file_matches_executable_p \ + rs6000coff_core_file_matches_executable_p + +extern char *rs6000coff_core_file_failing_command PARAMS ((bfd *abfd)); +#undef coff_core_file_failing_command +#define coff_core_file_failing_command rs6000coff_core_file_failing_command + +extern int rs6000coff_core_file_failing_signal PARAMS ((bfd *abfd)); +#undef coff_core_file_failing_signal +#define coff_core_file_failing_signal rs6000coff_core_file_failing_signal + +#undef coff_get_section_contents +#define coff_get_section_contents rs6000coff_get_section_contents +#endif /* AIX_CORE */ + +#ifdef LYNX_CORE + +#undef CORE_FILE_P +#define CORE_FILE_P lynx_core_file_p +extern const bfd_target *lynx_core_file_p PARAMS ((bfd *abfd)); + +extern boolean lynx_core_file_matches_executable_p PARAMS ((bfd *core_bfd, + bfd *exec_bfd)); +#undef coff_core_file_matches_executable_p +#define coff_core_file_matches_executable_p lynx_core_file_matches_executable_p + +extern char *lynx_core_file_failing_command PARAMS ((bfd *abfd)); +#undef coff_core_file_failing_command +#define coff_core_file_failing_command lynx_core_file_failing_command + +extern int lynx_core_file_failing_signal PARAMS ((bfd *abfd)); +#undef coff_core_file_failing_signal +#define coff_core_file_failing_signal lynx_core_file_failing_signal + +#endif /* LYNX_CORE */ + +#define _bfd_xcoff_bfd_get_relocated_section_contents \ + coff_bfd_get_relocated_section_contents +#define _bfd_xcoff_bfd_relax_section coff_bfd_relax_section +#define _bfd_xcoff_bfd_gc_sections coff_bfd_gc_sections +#define _bfd_xcoff_bfd_link_split_section coff_bfd_link_split_section + +/* XCOFF archives do not have anything which corresponds to an + extended name table. */ + +#define _bfd_xcoff_slurp_extended_name_table bfd_false +#define _bfd_xcoff_construct_extended_name_table \ + ((boolean (*) PARAMS ((bfd *, char **, bfd_size_type *, const char **))) \ + bfd_false) +#define _bfd_xcoff_truncate_arname bfd_dont_truncate_arname + +/* We can use the standard get_elt_at_index routine. */ + +#define _bfd_xcoff_get_elt_at_index _bfd_generic_get_elt_at_index + +/* XCOFF archives do not have a timestamp. */ + +#define _bfd_xcoff_update_armap_timestamp bfd_true + +extern boolean _bfd_xcoff_mkobject PARAMS ((bfd *)); +extern boolean _bfd_xcoff_copy_private_bfd_data PARAMS ((bfd *, bfd *)); +extern boolean _bfd_xcoff_is_local_label_name PARAMS ((bfd *, const char *)); +extern void _bfd_xcoff_rtype2howto + PARAMS ((arelent *, struct internal_reloc *)); +extern reloc_howto_type *_bfd_xcoff_reloc_type_lookup + PARAMS ((bfd *, bfd_reloc_code_real_type)); +extern boolean _bfd_xcoff_slurp_armap PARAMS ((bfd *)); +extern const bfd_target *_bfd_xcoff_archive_p PARAMS ((bfd *)); +extern PTR _bfd_xcoff_read_ar_hdr PARAMS ((bfd *)); +extern bfd *_bfd_xcoff_openr_next_archived_file PARAMS ((bfd *, bfd *)); +extern int _bfd_xcoff_generic_stat_arch_elt PARAMS ((bfd *, struct stat *)); +extern boolean _bfd_xcoff_write_armap + PARAMS ((bfd *, unsigned int, struct orl *, unsigned int, int)); +extern boolean _bfd_xcoff_write_archive_contents PARAMS ((bfd *)); +extern int _bfd_xcoff_sizeof_headers PARAMS ((bfd *, boolean)); +extern void _bfd_xcoff_swap_sym_in PARAMS ((bfd *, PTR, PTR)); +extern unsigned int _bfd_xcoff_swap_sym_out PARAMS ((bfd *, PTR, PTR)); +extern void _bfd_xcoff_swap_aux_in PARAMS ((bfd *, PTR, int, int, int, int, PTR)); +extern unsigned int _bfd_xcoff_swap_aux_out PARAMS ((bfd *, PTR, int, int, int, int, PTR)); + +#ifndef coff_SWAP_sym_in +#define coff_SWAP_sym_in _bfd_xcoff_swap_sym_in +#define coff_SWAP_sym_out _bfd_xcoff_swap_sym_out +#define coff_SWAP_aux_in _bfd_xcoff_swap_aux_in +#define coff_SWAP_aux_out _bfd_xcoff_swap_aux_out +#endif + +#include "coffcode.h" + +/* The transfer vector that leads the outside world to all of the above. */ + +const bfd_target TARGET_SYM = +{ + TARGET_NAME, + bfd_target_coff_flavour, + BFD_ENDIAN_BIG, /* data byte order is big */ + BFD_ENDIAN_BIG, /* header byte order is big */ + + (HAS_RELOC | EXEC_P | /* object flags */ + HAS_LINENO | HAS_DEBUG | DYNAMIC | + HAS_SYMS | HAS_LOCALS | WP_TEXT), + + (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */ + 0, /* leading char */ + '/', /* ar_pad_char */ + 15, /* ar_max_namelen??? FIXMEmgo */ + + bfd_getb64, bfd_getb_signed_64, bfd_putb64, + bfd_getb32, bfd_getb_signed_32, bfd_putb32, + bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */ + bfd_getb64, bfd_getb_signed_64, bfd_putb64, + bfd_getb32, bfd_getb_signed_32, bfd_putb32, + bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */ + + {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ + _bfd_xcoff_archive_p, CORE_FILE_P}, + {bfd_false, coff_mkobject, /* bfd_set_format */ + _bfd_generic_mkarchive, bfd_false}, + {bfd_false, coff_write_object_contents, /* bfd_write_contents */ + _bfd_xcoff_write_archive_contents, bfd_false}, + + BFD_JUMP_TABLE_GENERIC (coff), + BFD_JUMP_TABLE_COPY (coff), + BFD_JUMP_TABLE_CORE (coff), + BFD_JUMP_TABLE_ARCHIVE (_bfd_xcoff), + BFD_JUMP_TABLE_SYMBOLS (coff), + BFD_JUMP_TABLE_RELOCS (coff), + BFD_JUMP_TABLE_WRITE (coff), + BFD_JUMP_TABLE_LINK (_bfd_xcoff), + BFD_JUMP_TABLE_DYNAMIC (_bfd_xcoff), + + NULL, + + COFF_SWAP_TABLE +}; diff -upr --new-file binutils-2.9.5.0.41/bfd/xcoff.h binutils-2.9.5.0.42/bfd/xcoff.h --- binutils-2.9.5.0.41/bfd/xcoff.h Tue May 2 10:07:39 2000 +++ binutils-2.9.5.0.42/bfd/xcoff.h Wed Dec 31 16:00:00 1969 @@ -1,198 +0,0 @@ -/* Common definitions for backends based on IBM RS/6000 "XCOFF64" files. - Copyright 2000 - Free Software Foundation, Inc. - Contributed by Cygnus Support. - -This file is part of BFD, the Binary File Descriptor library. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -/* Internalcoff.h and coffcode.h modify themselves based on this flag. */ -#define RS6000COFF_C 1 - -#define SELECT_RELOC(internal, howto) \ - { \ - internal.r_type = howto->type; \ - internal.r_size = \ - ((howto->complain_on_overflow == complain_overflow_signed \ - ? 0x80 \ - : 0) \ - | (howto->bitsize - 1)); \ - } - -#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (3) - -#define COFF_LONG_FILENAMES - -#define NO_COFF_SYMBOLS - -#define RTYPE2HOWTO(cache_ptr, dst) _bfd_xcoff_rtype2howto (cache_ptr, dst) - -#define coff_mkobject _bfd_xcoff_mkobject -#define coff_bfd_copy_private_bfd_data _bfd_xcoff_copy_private_bfd_data -#define coff_bfd_is_local_label_name _bfd_xcoff_is_local_label_name -#define coff_bfd_reloc_type_lookup _bfd_xcoff_reloc_type_lookup -#define coff_relocate_section _bfd_ppc_xcoff_relocate_section - -#define CORE_FILE_P _bfd_dummy_target - -#define coff_core_file_failing_command _bfd_nocore_core_file_failing_command -#define coff_core_file_failing_signal _bfd_nocore_core_file_failing_signal -#define coff_core_file_matches_executable_p \ - _bfd_nocore_core_file_matches_executable_p - -#ifdef AIX_CORE -#undef CORE_FILE_P -#define CORE_FILE_P rs6000coff_core_p -extern const bfd_target * rs6000coff_core_p (); -extern boolean rs6000coff_get_section_contents (); -extern boolean rs6000coff_core_file_matches_executable_p (); - -#undef coff_core_file_matches_executable_p -#define coff_core_file_matches_executable_p \ - rs6000coff_core_file_matches_executable_p - -extern char *rs6000coff_core_file_failing_command PARAMS ((bfd *abfd)); -#undef coff_core_file_failing_command -#define coff_core_file_failing_command rs6000coff_core_file_failing_command - -extern int rs6000coff_core_file_failing_signal PARAMS ((bfd *abfd)); -#undef coff_core_file_failing_signal -#define coff_core_file_failing_signal rs6000coff_core_file_failing_signal - -#undef coff_get_section_contents -#define coff_get_section_contents rs6000coff_get_section_contents -#endif /* AIX_CORE */ - -#ifdef LYNX_CORE - -#undef CORE_FILE_P -#define CORE_FILE_P lynx_core_file_p -extern const bfd_target *lynx_core_file_p PARAMS ((bfd *abfd)); - -extern boolean lynx_core_file_matches_executable_p PARAMS ((bfd *core_bfd, - bfd *exec_bfd)); -#undef coff_core_file_matches_executable_p -#define coff_core_file_matches_executable_p lynx_core_file_matches_executable_p - -extern char *lynx_core_file_failing_command PARAMS ((bfd *abfd)); -#undef coff_core_file_failing_command -#define coff_core_file_failing_command lynx_core_file_failing_command - -extern int lynx_core_file_failing_signal PARAMS ((bfd *abfd)); -#undef coff_core_file_failing_signal -#define coff_core_file_failing_signal lynx_core_file_failing_signal - -#endif /* LYNX_CORE */ - -#define _bfd_xcoff_bfd_get_relocated_section_contents \ - coff_bfd_get_relocated_section_contents -#define _bfd_xcoff_bfd_relax_section coff_bfd_relax_section -#define _bfd_xcoff_bfd_gc_sections coff_bfd_gc_sections -#define _bfd_xcoff_bfd_link_split_section coff_bfd_link_split_section - -/* XCOFF archives do not have anything which corresponds to an - extended name table. */ - -#define _bfd_xcoff_slurp_extended_name_table bfd_false -#define _bfd_xcoff_construct_extended_name_table \ - ((boolean (*) PARAMS ((bfd *, char **, bfd_size_type *, const char **))) \ - bfd_false) -#define _bfd_xcoff_truncate_arname bfd_dont_truncate_arname - -/* We can use the standard get_elt_at_index routine. */ - -#define _bfd_xcoff_get_elt_at_index _bfd_generic_get_elt_at_index - -/* XCOFF archives do not have a timestamp. */ - -#define _bfd_xcoff_update_armap_timestamp bfd_true - -extern boolean _bfd_xcoff_mkobject PARAMS ((bfd *)); -extern boolean _bfd_xcoff_copy_private_bfd_data PARAMS ((bfd *, bfd *)); -extern boolean _bfd_xcoff_is_local_label_name PARAMS ((bfd *, const char *)); -extern void _bfd_xcoff_rtype2howto - PARAMS ((arelent *, struct internal_reloc *)); -extern reloc_howto_type *_bfd_xcoff_reloc_type_lookup - PARAMS ((bfd *, bfd_reloc_code_real_type)); -extern boolean _bfd_xcoff_slurp_armap PARAMS ((bfd *)); -extern const bfd_target *_bfd_xcoff_archive_p PARAMS ((bfd *)); -extern PTR _bfd_xcoff_read_ar_hdr PARAMS ((bfd *)); -extern bfd *_bfd_xcoff_openr_next_archived_file PARAMS ((bfd *, bfd *)); -extern int _bfd_xcoff_generic_stat_arch_elt PARAMS ((bfd *, struct stat *)); -extern boolean _bfd_xcoff_write_armap - PARAMS ((bfd *, unsigned int, struct orl *, unsigned int, int)); -extern boolean _bfd_xcoff_write_archive_contents PARAMS ((bfd *)); -extern int _bfd_xcoff_sizeof_headers PARAMS ((bfd *, boolean)); -extern void _bfd_xcoff_swap_sym_in PARAMS ((bfd *, PTR, PTR)); -extern unsigned int _bfd_xcoff_swap_sym_out PARAMS ((bfd *, PTR, PTR)); -extern void _bfd_xcoff_swap_aux_in PARAMS ((bfd *, PTR, int, int, int, int, PTR)); -extern unsigned int _bfd_xcoff_swap_aux_out PARAMS ((bfd *, PTR, int, int, int, int, PTR)); - -#ifndef coff_SWAP_sym_in -#define coff_SWAP_sym_in _bfd_xcoff_swap_sym_in -#define coff_SWAP_sym_out _bfd_xcoff_swap_sym_out -#define coff_SWAP_aux_in _bfd_xcoff_swap_aux_in -#define coff_SWAP_aux_out _bfd_xcoff_swap_aux_out -#endif - -#include "coffcode.h" - -/* The transfer vector that leads the outside world to all of the above. */ - -const bfd_target TARGET_SYM = -{ - TARGET_NAME, - bfd_target_coff_flavour, - BFD_ENDIAN_BIG, /* data byte order is big */ - BFD_ENDIAN_BIG, /* header byte order is big */ - - (HAS_RELOC | EXEC_P | /* object flags */ - HAS_LINENO | HAS_DEBUG | DYNAMIC | - HAS_SYMS | HAS_LOCALS | WP_TEXT), - - (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */ - 0, /* leading char */ - '/', /* ar_pad_char */ - 15, /* ar_max_namelen??? FIXMEmgo */ - - bfd_getb64, bfd_getb_signed_64, bfd_putb64, - bfd_getb32, bfd_getb_signed_32, bfd_putb32, - bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */ - bfd_getb64, bfd_getb_signed_64, bfd_putb64, - bfd_getb32, bfd_getb_signed_32, bfd_putb32, - bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */ - - {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ - _bfd_xcoff_archive_p, CORE_FILE_P}, - {bfd_false, coff_mkobject, /* bfd_set_format */ - _bfd_generic_mkarchive, bfd_false}, - {bfd_false, coff_write_object_contents, /* bfd_write_contents */ - _bfd_xcoff_write_archive_contents, bfd_false}, - - BFD_JUMP_TABLE_GENERIC (coff), - BFD_JUMP_TABLE_COPY (coff), - BFD_JUMP_TABLE_CORE (coff), - BFD_JUMP_TABLE_ARCHIVE (_bfd_xcoff), - BFD_JUMP_TABLE_SYMBOLS (coff), - BFD_JUMP_TABLE_RELOCS (coff), - BFD_JUMP_TABLE_WRITE (coff), - BFD_JUMP_TABLE_LINK (_bfd_xcoff), - BFD_JUMP_TABLE_DYNAMIC (_bfd_xcoff), - - NULL, - - COFF_SWAP_TABLE -}; diff -upr --new-file binutils-2.9.5.0.41/binutils/ChangeLog binutils-2.9.5.0.42/binutils/ChangeLog --- binutils-2.9.5.0.41/binutils/ChangeLog Tue May 2 10:58:24 2000 +++ binutils-2.9.5.0.42/binutils/ChangeLog Fri May 12 08:03:00 2000 @@ -1,3 +1,7 @@ +2000-05-08 Alan Modra + + * objcopy.c (setup_section): Add const and gettext calls for err. + 2000-05-02 H.J. Lu * readelf.c (get_osabi_name): Handle ELFOSABI_NONE instead of diff -upr --new-file binutils-2.9.5.0.41/binutils/ChangeLog.linux binutils-2.9.5.0.42/binutils/ChangeLog.linux --- binutils-2.9.5.0.41/binutils/ChangeLog.linux Wed Apr 5 17:15:14 2000 +++ binutils-2.9.5.0.42/binutils/ChangeLog.linux Fri May 12 08:11:30 2000 @@ -1,3 +1,12 @@ +2000-05-08 H.J. Lu (hjl@gnu.org) + + * nlmconv.c (temp_filename): Removed. + + * nlmconv.c (link_inputs): Use make_temp_file () instead of + choose_temp_base (). + * objdump.c (display_target_list): Likewise. + (display_info_table): Likewise. + Mon Oct 11 15:23:43 1999 H.J. Lu (hjl@gnu.org) * configure.in: Check HAVE_WEAK_SYMBOL before checking dlopen. diff -upr --new-file binutils-2.9.5.0.41/binutils/nlmconv.c binutils-2.9.5.0.42/binutils/nlmconv.c --- binutils-2.9.5.0.41/binutils/nlmconv.c Wed Apr 12 10:27:32 2000 +++ binutils-2.9.5.0.42/binutils/nlmconv.c Fri May 12 08:11:30 2000 @@ -2086,9 +2086,6 @@ powerpc_mangle_relocs (outbfd, insec, re #define LD_NAME "ld" #endif -/* Temporary file name base. */ -static char *temp_filename; - /* The user has specified several input files. Invoke the linker to link them all together, and convert and delete the resulting output file. */ @@ -2137,10 +2134,7 @@ link_inputs (inputs, ld) if (ld == NULL) ld = (char *) LD_NAME; - temp_filename = choose_temp_base (); - - unlink_on_exit = xmalloc (strlen (temp_filename) + 3); - sprintf (unlink_on_exit, "%s.O", temp_filename); + unlink_on_exit = make_temp_file (".O"); argv[0] = ld; argv[1] = (char *) "-Ur"; diff -upr --new-file binutils-2.9.5.0.41/binutils/objcopy.c binutils-2.9.5.0.42/binutils/objcopy.c --- binutils-2.9.5.0.41/binutils/objcopy.c Wed Apr 5 17:15:14 2000 +++ binutils-2.9.5.0.42/binutils/objcopy.c Fri May 12 08:11:30 2000 @@ -1245,7 +1245,7 @@ setup_section (ibfd, isection, obfdarg) bfd_vma vma; bfd_vma lma; flagword flags; - char *err; + const char *err; if ((bfd_get_section_flags (ibfd, isection) & SEC_DEBUGGING) != 0 && (strip_symbols == STRIP_DEBUG @@ -1268,7 +1268,7 @@ setup_section (ibfd, isection, obfdarg) if (osection == NULL) { - err = "making"; + err = _("making"); goto loser; } @@ -1277,7 +1277,7 @@ setup_section (ibfd, isection, obfdarg) size = (size + interleave - 1) / interleave; if (! bfd_set_section_size (obfd, osection, size)) { - err = "size"; + err = _("size"); goto loser; } @@ -1291,7 +1291,7 @@ setup_section (ibfd, isection, obfdarg) if (! bfd_set_section_vma (obfd, osection, vma)) { - err = "vma"; + err = _("vma"); goto loser; } @@ -1317,7 +1317,7 @@ setup_section (ibfd, isection, obfdarg) bfd_section_alignment (ibfd, isection)) == false) { - err = "alignment"; + err = _("alignment"); goto loser; } @@ -1326,7 +1326,7 @@ setup_section (ibfd, isection, obfdarg) flags = p->flags | (flags & SEC_HAS_CONTENTS); if (!bfd_set_section_flags (obfd, osection, flags)) { - err = "flags"; + err = _("flags"); goto loser; } @@ -1340,7 +1340,7 @@ setup_section (ibfd, isection, obfdarg) from the input section to the output section. */ if (!bfd_copy_private_section_data (ibfd, isection, obfd, osection)) { - err = "private data"; + err = _("private data"); goto loser; } diff -upr --new-file binutils-2.9.5.0.41/binutils/objdump.c binutils-2.9.5.0.42/binutils/objdump.c --- binutils-2.9.5.0.41/binutils/objdump.c Thu Apr 20 15:25:48 2000 +++ binutils-2.9.5.0.42/binutils/objdump.c Fri May 12 08:11:30 2000 @@ -2639,7 +2639,7 @@ display_target_list () char *dummy_name; int t; - dummy_name = choose_temp_base (); + dummy_name = make_temp_file (NULL); for (t = 0; bfd_target_vector[t]; t++) { bfd_target *p = bfd_target_vector[t]; @@ -2691,7 +2691,7 @@ display_info_table (first, last) printf ("%s ", bfd_target_vector[t]->name); putchar ('\n'); - dummy_name = choose_temp_base (); + dummy_name = make_temp_file (NULL); for (a = (int) bfd_arch_obscure + 1; a < (int) bfd_arch_last; a++) if (strcmp (bfd_printable_arch_mach (a, 0), "UNKNOWN!") != 0) { diff -upr --new-file binutils-2.9.5.0.41/binutils.spec binutils-2.9.5.0.42/binutils.spec --- binutils-2.9.5.0.41/binutils.spec Tue May 2 11:07:33 2000 +++ binutils-2.9.5.0.42/binutils.spec Fri May 12 08:21:28 2000 @@ -1,6 +1,6 @@ Summary: GNU Binary Utility Development Utilities Name: binutils -Version: 2.9.5.0.41 +Version: 2.9.5.0.42 Release: 1 Copyright: GPL Group: Development/Tools @@ -38,14 +38,16 @@ fi echo "MAKE=make -j $NRPROC" > makefile echo "include Makefile" >> makefile ADDITIONAL_TARGETS="" -%ifarch i386 +%ifarch i386 i486 i586 i686 ADDITIONAL_TARGETS="--enable-targets=i386-linuxaout,i386-coff" %else %ifarch sparc ADDITIONAL_TARGETS="--enable-targets=sparc64-linux" %endif %endif -./configure --prefix=/usr --enable-shared $ADDITIONAL_TARGETS + +CFLAGS="$RPM_OPT_FLAGS" CXXFLAGS="$RPM_OPT_FLAGS" \ + ./configure --prefix=/usr --enable-shared $ADDITIONAL_TARGETS make tooldir=/usr all info %install diff -upr --new-file binutils-2.9.5.0.41/binutils.spec.in binutils-2.9.5.0.42/binutils.spec.in --- binutils-2.9.5.0.41/binutils.spec.in Sat Feb 19 11:20:57 2000 +++ binutils-2.9.5.0.42/binutils.spec.in Fri May 12 08:11:26 2000 @@ -38,14 +38,16 @@ fi echo "MAKE=make -j $NRPROC" > makefile echo "include Makefile" >> makefile ADDITIONAL_TARGETS="" -%ifarch i386 +%ifarch i386 i486 i586 i686 ADDITIONAL_TARGETS="--enable-targets=i386-linuxaout,i386-coff" %else %ifarch sparc ADDITIONAL_TARGETS="--enable-targets=sparc64-linux" %endif %endif -./configure --prefix=/usr --enable-shared $ADDITIONAL_TARGETS + +CFLAGS="$RPM_OPT_FLAGS" CXXFLAGS="$RPM_OPT_FLAGS" \ + ./configure --prefix=/usr --enable-shared $ADDITIONAL_TARGETS make tooldir=/usr all info %install diff -upr --new-file binutils-2.9.5.0.41/configure.in binutils-2.9.5.0.42/configure.in --- binutils-2.9.5.0.41/configure.in Fri Mar 31 09:28:34 2000 +++ binutils-2.9.5.0.42/configure.in Fri May 12 08:11:26 2000 @@ -669,6 +669,10 @@ case "${target}" in esac noconfigdirs="$noconfigdirs ld shellutils" ;; + ia64*-*-elf*) + # No gdb support yet. + noconfigdirs="$noconfigdirs tix readline mmalloc libgui itcl gdb" + ;; i[3456]86-*-coff | i[3456]86-*-elf) if [ x${is_cross_compiler} != xno ] ; then target_configdirs="${target_configdirs} target-libstub target-cygmon" diff -upr --new-file binutils-2.9.5.0.41/gas/ChangeLog binutils-2.9.5.0.42/gas/ChangeLog --- binutils-2.9.5.0.41/gas/ChangeLog Tue May 2 10:08:02 2000 +++ binutils-2.9.5.0.42/gas/ChangeLog Fri May 12 08:04:04 2000 @@ -1,3 +1,74 @@ +2000-05-12 Alexandre Oliva + + * config/tc-mn10300.h (md_end): Define. + (mn10300_finalize): Declare. + * config/tc-mn10300.c: Include dwarf2dbg.h. + (debug_line): Define. + (md_assemble): Generate dwarf2 line info. + (mn10300_finalize): New function. Finalize dwarf2 info. + +2000-05-11 Ulf Carlsson + + * config/tc-mips.c (md_estimate_size_before_relax): Use the + external version of the relocation for weak symbols. + +2000-05-08 David Mosberger + + * config/tc-ia64.c (output_P7_format, case mem_stack_f): Output fixed + frame size in units of 16 bytes, as required per SW Conventions manual. + (output_unw_records): Output info-block header as a dword to get + byte-order right. + +2000-05-08 Alan Modra + + * as.h: #include "file", not on files from ../include. + (as_abort, as_fatal): Add ATTRIBUTE_NORETURN. + * config/tc-m68k.c (m68k_ip): Fix signed/unsigned warnings. + (md_convert_frag): Add ATTRIBUTE_UNUSED. + (tc_coff_symbol_emit_hook): Ditto. + (OPTCOUNT): Cast to int to avoid compiler warning. + (md_begin): Fix signed/unsigned warnings. + +2000-05-08 Michael Sokolov + + * config/tc-m68k.c (md_convert_frag_1): Abort if we end up in the + ABRANCH LONG case for a conditional branch on a 68000. + (md_estimate_size_before_relax): Likewise. Also handle + flag_short_refs correctly for ABRANCH, BCC68000, and DBCC. + (m68k-ip: case ABSL): Relax absolute references to 16-bit + PC-relative on all CPUs. + (md_estimate_size_before_relax): Likewise. + +2000-05-04 Alan Modra + + * as.c (parse_args): Just mention current year in printed + copyright message. + +2000-05-03 J.T. Conklin + + * config/tc-ppc.c (pre_defined_registers): Add entries for vector + unit registers. + (md_parse_option): Recognize -m7400. + +2000-05-03 Ian Lance Taylor + + * config/atof-ieee.c (gen_to_words): When adding carry back in, + don't permit lp to become less than the words array. + +2000-05-03 Rodney Brown + + config/tc-mcore.c (md_apply_fix3): BFD_RELOC_MCORE_PCREL_IMM11BY2 + Fix little-endian case. + +2000-05-03 David O'Brien + + * as.c (parse_args): Update copyright. + +2000-05-03 Mark Elbrecht + + * gas/config/tc-i386.h (SUB_SEGMENT_ALIGN): If TE_GO32, return 4 + for the .bss section too. + 2000-05-02 Alan Modra * configure.in: Set em=linux for hppa-*-linux. @@ -446,7 +517,7 @@ Mon Apr 3 13:56:03 2000 Hans-Peter Nil 2000-03-19 Nick Clifton - * config/tc-arm.c (md_apply_fix3): Fix bug detectng overflow of pc + * config/tc-arm.c (md_apply_fix3): Fix bug detecting overflow of pc relative branches. 2000-03-17 Thomas de Lellis @@ -542,8 +613,6 @@ Sat Mar 11 00:01:39 2000 Hans-Peter Nil * doc/Makefile.in: Regenerate. * doc/c-m32r.texi (M32R-Opts): Document new command line switch. - - 2000-03-02 Michael Meissner * config/tc-d30v.c (check_range): Remove code that incorrectly @@ -911,6 +980,7 @@ Fri Feb 11 14:21:51 2000 Jeffrey A Law filename is encoded incorrectly. 2000-01-31 Nick Clifton + * config/tc-arm.c (reg_table): Add support for ATPCS register naming conventions. @@ -1188,7 +1258,7 @@ Wed Nov 24 20:27:58 1999 Jeffrey A Law * config/tc-hppa.c (pa_ip): Handle PA2.0 unit completers. Handle 'B' operand for PA2.0 bb instruction. - + 1999-11-18 Nick Clifton * config/tc-mcore.h (TC_FORCE_RELOCATION): Define for Mcore-pe @@ -1365,14 +1435,14 @@ Sun Oct 10 01:47:23 1999 Jerry Quinn * config/tc-m32r.c (md_longopts): Fix value for -Wnuh. @@ -1956,7 +2021,7 @@ Wed Aug 4 13:12:17 1999 Jeffrey A Law 1999-07-30 Catherine Moore - * config/tc-arm.c (tc_gen_reloc): Record the vtable entry in + * config/tc-arm.c (tc_gen_reloc): Record the vtable entry in the relocation's section offset. 1999-07-29 Alan Modra diff -upr --new-file binutils-2.9.5.0.41/gas/as.c binutils-2.9.5.0.42/gas/as.c --- binutils-2.9.5.0.41/gas/as.c Tue May 2 10:23:22 2000 +++ binutils-2.9.5.0.42/gas/as.c Fri May 12 08:11:30 2000 @@ -514,7 +514,7 @@ parse_args (pargc, pargv) case OPTION_VERSION: /* This output is intended to follow the GNU standards document. */ printf (_("GNU assembler %s\n"), VERSION); - printf (_("Copyright 1997 Free Software Foundation, Inc.\n")); + printf (_("Copyright 2000 Free Software Foundation, Inc.\n")); printf (_("\ This program is free software; you may redistribute it under the terms of\n\ the GNU General Public License. This program has absolutely no warranty.\n")); diff -upr --new-file binutils-2.9.5.0.41/gas/as.h binutils-2.9.5.0.42/gas/as.h --- binutils-2.9.5.0.41/gas/as.h Tue May 2 10:23:22 2000 +++ binutils-2.9.5.0.42/gas/as.h Fri May 12 08:11:30 2000 @@ -138,14 +138,14 @@ extern void *alloca (); /* Now GNU header files... */ -#include +#include "ansidecl.h" #ifdef BFD_ASSEMBLER -#include +#include "bfd.h" #endif -#include +#include "libiberty.h" /* Define the standard progress macros. */ -#include +#include "progress.h" /* This doesn't get taken care of anywhere. */ #ifndef __MWERKS__ /* Metrowerks C chokes on the "defined (inline)" */ @@ -543,14 +543,14 @@ typedef struct _pseudo_type pseudo_typeS #endif /* ! USE_STDARG */ PRINTF_LIKE (as_bad); -PRINTF_LIKE (as_fatal); +PRINTF_LIKE (as_fatal) ATTRIBUTE_NORETURN; PRINTF_LIKE (as_tsktsk); PRINTF_LIKE (as_warn); PRINTF_WHERE_LIKE (as_bad_where); PRINTF_WHERE_LIKE (as_warn_where); void as_assert PARAMS ((const char *, int, const char *)); -void as_abort PARAMS ((const char *, int, const char *)); +void as_abort PARAMS ((const char *, int, const char *)) ATTRIBUTE_NORETURN; void fprint_value PARAMS ((FILE *file, addressT value)); void sprint_value PARAMS ((char *buf, addressT value)); diff -upr --new-file binutils-2.9.5.0.41/gas/config/atof-ieee.c binutils-2.9.5.0.42/gas/config/atof-ieee.c --- binutils-2.9.5.0.41/gas/config/atof-ieee.c Mon Sep 13 09:37:12 1999 +++ binutils-2.9.5.0.42/gas/config/atof-ieee.c Fri May 12 08:04:10 2000 @@ -1,5 +1,5 @@ /* atof_ieee.c - turn a Flonum into an IEEE floating point number - Copyright (C) 1987, 92, 93, 94, 95, 96, 97, 98, 1999 + Copyright (C) 1987, 92, 93, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -624,11 +624,13 @@ gen_to_words (words, precision, exponent don't get a sticky sign bit after shifting right, and that permits us to propagate the carry without any masking of bits. #endif */ - for (carry = 1, lp--; carry && (lp >= words); lp--) + for (carry = 1, lp--; carry; lp--) { carry = *lp + carry; *lp = carry; carry >>= LITTLENUM_NUMBER_OF_BITS; + if (lp == words) + break; } if (precision == X_PRECISION && exponent_bits == 15) { diff -upr --new-file binutils-2.9.5.0.41/gas/config/tc-i386.h binutils-2.9.5.0.42/gas/config/tc-i386.h --- binutils-2.9.5.0.41/gas/config/tc-i386.h Thu Feb 24 11:11:48 2000 +++ binutils-2.9.5.0.42/gas/config/tc-i386.h Fri May 12 08:04:13 2000 @@ -120,6 +120,7 @@ extern int tc_coff_sizemachdep PARAMS (( #define SUB_SEGMENT_ALIGN(SEG) \ ((strcmp (obj_segment_name (SEG), ".text") == 0 \ || strcmp (obj_segment_name (SEG), ".data") == 0 \ + || strcmp (obj_segment_name (SEG), ".bss") == 0 \ || strncmp (obj_segment_name (SEG), ".gnu.linkonce.t", 15) == 0 \ || strncmp (obj_segment_name (SEG), ".gnu.linkonce.d", 15) == 0 \ || strncmp (obj_segment_name (SEG), ".gnu.linkonce.r", 15) == 0) \ diff -upr --new-file binutils-2.9.5.0.41/gas/config/tc-ia64.c binutils-2.9.5.0.42/gas/config/tc-ia64.c --- binutils-2.9.5.0.41/gas/config/tc-ia64.c Sun Apr 23 09:40:59 2000 +++ binutils-2.9.5.0.42/gas/config/tc-ia64.c Fri May 12 08:04:17 2000 @@ -1010,8 +1010,8 @@ output_P7_format (f, rtype, w1, w2) switch (rtype) { case mem_stack_f: - r = 0; - count += output_leb128 (bytes + count, w2, 0); + r = 0; + count += output_leb128 (bytes + count, w2 >> 4, 0); break; case mem_stack_v: r = 1; @@ -2213,11 +2213,10 @@ output_unw_records (list, ptr) /* Clear the padding area and personality. */ memset (mem + 8 + size, 0 , extra + 8); /* Initialize the header area. */ - md_number_to_chars (mem, 1, 2); /* version number. */ - md_number_to_chars (mem + 2, 0x03, 2); /* Set E and U handler bits. */ - - /* Length in double words. */ - md_number_to_chars (mem + 4, (size + extra) / 8, 4); + md_number_to_chars (mem, ( ((bfd_vma) 1 << 48) /* version */ + | ((bfd_vma) 3 << 32) /* U & E handler flags */ + | ((size + extra) / 8)), /* length (dwords) */ + 8); process_unw_records (list, output_vbyte_mem); diff -upr --new-file binutils-2.9.5.0.41/gas/config/tc-m68k.c binutils-2.9.5.0.42/gas/config/tc-m68k.c --- binutils-2.9.5.0.41/gas/config/tc-m68k.c Mon Jul 12 10:13:50 1999 +++ binutils-2.9.5.0.42/gas/config/tc-m68k.c Fri May 12 08:04:14 2000 @@ -1,5 +1,5 @@ /* tc-m68k.c -- Assemble for the m68k family - Copyright (C) 1987, 91, 92, 93, 94, 95, 96, 97, 98, 1999 + Copyright (C) 1987, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -1822,7 +1822,8 @@ m68k_ip (instring) default: { int got_one = 0, idx; - for (idx = 0; idx < sizeof (archs) / sizeof (archs[0]); + for (idx = 0; + idx < (int) (sizeof (archs) / sizeof (archs[0])); idx++) { if ((archs[idx].arch & ok_arch) @@ -2363,8 +2364,6 @@ m68k_ip (instring) addword (nextword); break; } - /* Don't generate pc relative code on 68010 and - 68000. */ if (isvar (&opP->disp) && !subs (&opP->disp) && adds (&opP->disp) @@ -2375,7 +2374,6 @@ m68k_ip (instring) #endif && S_GET_SEGMENT (adds (&opP->disp)) == now_seg && relaxable_symbol (adds (&opP->disp)) - && HAVE_LONG_BRANCH(current_architecture) && !flag_long_jumps && !strchr ("~%&$?", s[0])) { @@ -2755,7 +2753,7 @@ m68k_ip (instring) case 'O': tmpreg = ((opP->mode == DREG) - ? 0x20 + opP->reg - DATA + ? 0x20 + (int) (opP->reg - DATA) : (get_num (&opP->disp, 40) & 0x1F)); install_operand (s[1], tmpreg); break; @@ -3705,7 +3703,7 @@ md_begin () register const struct m68k_opcode *ins; register struct m68k_incant *hack, *slak; register const char *retval = 0; /* empty string, or error msg text */ - register unsigned int i; + register int i; register char c; if (flag_mri) @@ -3786,7 +3784,9 @@ md_begin () { "bsr", "jbsr", }, }; - for (i = 0; i < sizeof mri_aliases / sizeof mri_aliases[0]; i++) + for (i = 0; + i < (int) (sizeof mri_aliases / sizeof mri_aliases[0]); + i++) { const char *name = mri_aliases[i].primary; const char *alias = mri_aliases[i].alias; @@ -3799,10 +3799,10 @@ md_begin () } } - for (i = 0; i < sizeof (mklower_table); i++) + for (i = 0; i < (int) sizeof (mklower_table); i++) mklower_table[i] = (isupper (c = (char) i)) ? tolower (c) : c; - for (i = 0; i < sizeof (notend_table); i++) + for (i = 0; i < (int) sizeof (notend_table); i++) { notend_table[i] = 0; alt_notend_table[i] = 0; @@ -4348,7 +4348,10 @@ md_convert_frag_1 (fragP) } else { - as_bad (_("Long branch offset not supported.")); + /* This should never happen, because if it's a conditional + branch and we are on a 68000, BCC68000 should have been + picked instead of ABRANCH. */ + abort (); } } else @@ -4484,8 +4487,8 @@ md_convert_frag_1 (fragP) void md_convert_frag (headers, sec, fragP) - object_headers *headers; - segT sec; + object_headers *headers ATTRIBUTE_UNUSED; + segT sec ATTRIBUTE_UNUSED; fragS *fragP; { md_convert_frag_1 (fragP); @@ -4529,6 +4532,14 @@ md_estimate_size_before_relax (fragP, se fragP->fr_subtype = TAB (TABTYPE (fragP->fr_subtype), BYTE); break; } + else if ((fragP->fr_symbol != NULL) && flag_short_refs) + { /* Symbol is undefined and we want short ref */ + fix_new (fragP, (int) (fragP->fr_fix), 2, fragP->fr_symbol, + fragP->fr_offset, 1, NO_RELOC); + fragP->fr_fix += 2; + frag_wane (fragP); + break; + } else if ((fragP->fr_symbol == 0) || !HAVE_LONG_BRANCH(current_architecture)) { /* On 68000, or for absolute value, switch to abs long */ @@ -4553,7 +4564,10 @@ md_estimate_size_before_relax (fragP, se } else { - as_warn (_("Long branch offset to extern symbol not supported.")); + /* This should never happen, because if it's a conditional + branch and we are on a 68000, BCC68000 should have been + picked instead of ABRANCH. */ + abort (); } } else @@ -4593,9 +4607,7 @@ md_estimate_size_before_relax (fragP, se { if ((S_GET_SEGMENT (fragP->fr_symbol) == segment && relaxable_symbol (fragP->fr_symbol)) - || flag_short_refs - || cpu_of_arch (current_architecture) < m68020 - || cpu_of_arch (current_architecture) == mcf5200) + || flag_short_refs) { fragP->fr_subtype = TAB (PCREL, SHORT); fragP->fr_var += 2; @@ -4618,21 +4630,17 @@ md_estimate_size_before_relax (fragP, se break; } /* only Bcc 68000 instructions can come here */ - /* change bcc into b!cc/jmp absl long */ - fragP->fr_opcode[0] ^= 0x01; /* invert bcc */ - if (flag_short_refs) + if ((fragP->fr_symbol != NULL) && flag_short_refs) { - fragP->fr_opcode[1] = 0x04; /* branch offset = 6 */ - /* JF: these were fr_opcode[2,3] */ - buffer_address[0] = 0x4e; /* put in jmp long (0x4ef9) */ - buffer_address[1] = (char) 0xf8; - fragP->fr_fix += 2; /* account for jmp instruction */ + /* the user wants short refs, so emit one */ fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, - fragP->fr_offset, 0, NO_RELOC); + fragP->fr_offset, 1, NO_RELOC); fragP->fr_fix += 2; } else { + /* change bcc into b!cc/jmp absl long */ + fragP->fr_opcode[0] ^= 0x01; /* invert bcc */ fragP->fr_opcode[1] = 0x06; /* branch offset = 6 */ /* JF: these were fr_opcode[2,3] */ buffer_address[0] = 0x4e; /* put in jmp long (0x4ef9) */ @@ -4657,25 +4665,21 @@ md_estimate_size_before_relax (fragP, se break; } /* only DBcc 68000 instructions can come here */ - /* change dbcc into dbcc/jmp absl long */ - /* JF: these used to be fr_opcode[2-4], which is wrong. */ - buffer_address[0] = 0x00; /* branch offset = 4 */ - buffer_address[1] = 0x04; - buffer_address[2] = 0x60; /* put in bra pc + ... */ - if (flag_short_refs) + if (fragP->fr_symbol != NULL && flag_short_refs) { - /* JF: these were fr_opcode[5-7] */ - buffer_address[3] = 0x04; /* plus 4 */ - buffer_address[4] = 0x4e; /* Put in Jump Word */ - buffer_address[5] = (char) 0xf8; - fragP->fr_fix += 6; /* account for bra/jmp instruction */ + /* the user wants short refs, so emit one */ fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, - fragP->fr_offset, 0, NO_RELOC); + fragP->fr_offset, 1, NO_RELOC); fragP->fr_fix += 2; } else { + /* change dbcc into dbcc/jmp absl long */ + /* JF: these used to be fr_opcode[2-4], which is wrong. */ + buffer_address[0] = 0x00; /* branch offset = 4 */ + buffer_address[1] = 0x04; + buffer_address[2] = 0x60; /* put in bra pc + ... */ /* JF: these were fr_opcode[5-7] */ buffer_address[3] = 0x06; /* Plus 6 */ buffer_address[4] = 0x4e; /* put in jmp long (0x4ef9) */ @@ -5259,7 +5263,7 @@ static const struct opt_action opt_table { "x", 0, 0, 0, 0 } }; -#define OPTCOUNT (sizeof opt_table / sizeof opt_table[0]) +#define OPTCOUNT ((int) (sizeof opt_table / sizeof opt_table[0])) /* The MRI OPT pseudo-op. */ @@ -7103,7 +7107,7 @@ md_pcrel_from (fixP) /*ARGSUSED*/ void tc_coff_symbol_emit_hook (ignore) - symbolS *ignore; + symbolS *ignore ATTRIBUTE_UNUSED; { } diff -upr --new-file binutils-2.9.5.0.41/gas/config/tc-mcore.c binutils-2.9.5.0.42/gas/config/tc-mcore.c --- binutils-2.9.5.0.41/gas/config/tc-mcore.c Sat Feb 19 11:22:07 2000 +++ binutils-2.9.5.0.42/gas/config/tc-mcore.c Fri May 12 08:04:14 2000 @@ -74,14 +74,14 @@ const char line_comment_chars[] = "#/"; const int md_reloc_size = 8; -static int do_jsri2bsr = 0; /* change here from 1 by Cruess 19 August 97 */ +static int do_jsri2bsr = 0; /* Change here from 1 by Cruess 19 August 97. */ static int sifilter_mode = 0; const char EXP_CHARS[] = "eE"; -/* Chars that mean this number is a floating point constant */ -/* As in 0f12.456 */ -/* or 0d1.2345e12 */ +/* Chars that mean this number is a floating point constant + As in 0f12.456 + or 0d1.2345e12 */ const char FLT_CHARS[] = "rRsSfFdDxXpP"; #define C(what,length) (((what) << 2) + (length)) @@ -113,7 +113,7 @@ cpu_type; cpu_type cpu = M340; -/* Initialize the relax table */ +/* Initialize the relax table. */ const relax_typeS md_relax_table[] = { { 1, 1, 0, 0 }, /* 0: unused */ @@ -131,7 +131,7 @@ const relax_typeS md_relax_table[] = { 0, 0, 0, 0 } /*12: unused */ }; -/* LITERAL POOL DATA STRUCTURES */ +/* Literal pool data structures. */ struct literal { unsigned short refcnt; @@ -158,18 +158,18 @@ static unsigned long poolspan; -- so we have to be smaller than 1018 and since we deal with 2-byte instructions, the next good choice is 1016. -- Note we have a test case that fails when we've got 1018 here. */ -#define SPANPANIC (1016) /* 1024 - 1 entry - 2 byte rounding */ +#define SPANPANIC (1016) /* 1024 - 1 entry - 2 byte rounding. */ #define SPANCLOSE (900) #define SPANEXIT (600) -static symbolS * poolsym; /* label for current pool */ +static symbolS * poolsym; /* label for current pool. */ static char poolname[8]; -static struct hash_control * opcode_hash_control; /* Opcode mnemonics */ +static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */ /* This table describes all the machine specific pseudo-ops the assembler has to support. The fields are: Pseudo-op name without dot Function to call to execute this pseudo-op - Integer arg to pass to the function */ + Integer arg to pass to the function. */ const pseudo_typeS md_pseudo_table[] = { { "export", s_globl, 0 }, @@ -2146,8 +2146,8 @@ md_apply_fix3 (fixP, valp, segment) } else { - buf[0] |= ((val >> 8) & 0x7); - buf[1] |= (val & 0xff); + buf[1] |= ((val >> 8) & 0x7); + buf[0] |= (val & 0xff); } break; diff -upr --new-file binutils-2.9.5.0.41/gas/config/tc-mips.c binutils-2.9.5.0.42/gas/config/tc-mips.c --- binutils-2.9.5.0.41/gas/config/tc-mips.c Tue May 2 10:23:24 2000 +++ binutils-2.9.5.0.42/gas/config/tc-mips.c Fri May 12 08:11:30 2000 @@ -11031,7 +11031,12 @@ md_estimate_size_before_relax (fragp, se /* This must duplicate the test in adjust_reloc_syms. */ change = (symsec != &bfd_und_section && symsec != &bfd_abs_section - && ! bfd_is_com_section (symsec)); + && ! bfd_is_com_section (symsec) +#ifdef OBJ_ELF + /* A weak symbol is treated as external. */ + && ! S_IS_WEAK (sym) +#endif + ); } else abort (); diff -upr --new-file binutils-2.9.5.0.41/gas/config/tc-mn10300.c binutils-2.9.5.0.42/gas/config/tc-mn10300.c --- binutils-2.9.5.0.41/gas/config/tc-mn10300.c Sun Apr 23 09:40:57 2000 +++ binutils-2.9.5.0.42/gas/config/tc-mn10300.c Fri May 12 08:04:15 2000 @@ -23,6 +23,7 @@ #include "as.h" #include "subsegs.h" #include "opcode/mn10300.h" +#include "dwarf2dbg.h" /* Structure to hold information about predefined registers. */ struct reg_name @@ -31,6 +32,8 @@ struct reg_name int value; }; +struct dwarf2_line_info debug_line; + /* Generic assembler global variables which must be defined by all targets. */ /* Characters which always start a comment. */ @@ -118,6 +121,8 @@ size_t md_longopts_size = sizeof(md_long /* The target specific pseudo-ops which we support. */ const pseudo_typeS md_pseudo_table[] = { + { "file", dwarf2_directive_file }, + { "loc", dwarf2_directive_loc }, { "am30", set_arch_mach, AM30 }, { "am33", set_arch_mach, AM33 }, { "mn10300", set_arch_mach, MN103 }, @@ -1745,6 +1750,21 @@ keep_going: } } } + + if (debug_type == DEBUG_DWARF2) + { + bfd_vma addr; + + /* First update the notion of the current source line. */ + dwarf2_where (&debug_line); + + /* We want the offset of the start of this instruction within the + the current frag. */ + addr = frag_now->fr_address + frag_now_fix () - size; + + /* And record the information. */ + dwarf2_gen_line_info (addr, &debug_line); + } } @@ -1998,4 +2018,11 @@ set_arch_mach (mach) as_warn (_("could not set architecture and machine")); current_machine = mach; +} + +void +mn10300_finalize () +{ + if (debug_type == DEBUG_DWARF2) + dwarf2_finish (); } diff -upr --new-file binutils-2.9.5.0.41/gas/config/tc-mn10300.h binutils-2.9.5.0.42/gas/config/tc-mn10300.h --- binutils-2.9.5.0.41/gas/config/tc-mn10300.h Thu Jun 3 11:02:01 1999 +++ binutils-2.9.5.0.42/gas/config/tc-mn10300.h Fri May 12 08:04:15 2000 @@ -1,5 +1,5 @@ /* tc-mn10300.h -- Header file for tc-mn10300.c. - Copyright (C) 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 2000 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -48,3 +48,6 @@ /* We do relaxing in the assembler as well as the linker. */ extern const struct relax_type md_relax_table[]; #define TC_GENERIC_RELAX_TABLE md_relax_table + +#define md_end() mn10300_finalize () +void mn10300_finalize PARAMS ((void)); diff -upr --new-file binutils-2.9.5.0.41/gas/config/tc-ppc.c binutils-2.9.5.0.42/gas/config/tc-ppc.c --- binutils-2.9.5.0.41/gas/config/tc-ppc.c Tue May 2 10:08:21 2000 +++ binutils-2.9.5.0.42/gas/config/tc-ppc.c Fri May 12 08:04:15 2000 @@ -239,11 +239,14 @@ struct pd_reg 1. r which has the value . 2. r. which has the value . - Each floating point register has predefined names of the form: 1. f which has the value . 2. f. which has the value . + Each vector unit register has predefined names of the form: + 1. v which has the value . + 2. v. which has the value . + Each condition register has predefined names of the form: 1. cr which has the value . 2. cr. which has the value . @@ -441,6 +444,72 @@ static const struct pd_reg pre_defined_r { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */ { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */ + + { "v.0", 0 }, /* Vector registers */ + { "v.1", 1 }, + { "v.10", 10 }, + { "v.11", 11 }, + { "v.12", 12 }, + { "v.13", 13 }, + { "v.14", 14 }, + { "v.15", 15 }, + { "v.16", 16 }, + { "v.17", 17 }, + { "v.18", 18 }, + { "v.19", 19 }, + { "v.2", 2 }, + { "v.20", 20 }, + { "v.21", 21 }, + { "v.22", 22 }, + { "v.23", 23 }, + { "v.24", 24 }, + { "v.25", 25 }, + { "v.26", 26 }, + { "v.27", 27 }, + { "v.28", 28 }, + { "v.29", 29 }, + { "v.3", 3 }, + { "v.30", 30 }, + { "v.31", 31 }, + { "v.4", 4 }, + { "v.5", 5 }, + { "v.6", 6 }, + { "v.7", 7 }, + { "v.8", 8 }, + { "v.9", 9 }, + + { "v0", 0 }, + { "v1", 1 }, + { "v10", 10 }, + { "v11", 11 }, + { "v12", 12 }, + { "v13", 13 }, + { "v14", 14 }, + { "v15", 15 }, + { "v16", 16 }, + { "v17", 17 }, + { "v18", 18 }, + { "v19", 19 }, + { "v2", 2 }, + { "v20", 20 }, + { "v21", 21 }, + { "v22", 22 }, + { "v23", 23 }, + { "v24", 24 }, + { "v25", 25 }, + { "v26", 26 }, + { "v27", 27 }, + { "v28", 28 }, + { "v29", 29 }, + { "v3", 3 }, + { "v30", 30 }, + { "v31", 31 }, + { "v4", 4 }, + { "v5", 5 }, + { "v6", 6 }, + { "v7", 7 }, + { "v8", 8 }, + { "v9", 9 }, { "xer", 1 }, @@ -776,6 +845,8 @@ md_parse_option (c, arg) || strcmp (arg, "603") == 0 || strcmp (arg, "604") == 0) ppc_cpu = PPC_OPCODE_PPC; + else if (strcmp (arg, "7400") == 0) + ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC; /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC 620. */ else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0) diff -upr --new-file binutils-2.9.5.0.41/gas/testsuite/ChangeLog binutils-2.9.5.0.42/gas/testsuite/ChangeLog --- binutils-2.9.5.0.41/gas/testsuite/ChangeLog Tue May 2 10:08:29 2000 +++ binutils-2.9.5.0.42/gas/testsuite/ChangeLog Fri May 12 08:04:19 2000 @@ -1,3 +1,14 @@ +2000-05-11 Ulf Carlsson + + * gas/mips/mips.exp: Include *-*-linux* in svr4pic. + + * gas/mips/jal-svr4pic.{s,d} gas/mips/jal-xgot.d: Add a jal to a + weak symbol. + +2000-05-08 Alan Modra + + * gas/mri/float.d: Fix for srec length change. + 2000-05-02 Alan Modra * gas/hppa/unsorted/unsorted.exp: Duplicate hppa*-*-*elf* diff -upr --new-file binutils-2.9.5.0.41/gas/testsuite/gas/mips/jal-svr4pic.d binutils-2.9.5.0.42/gas/testsuite/gas/mips/jal-svr4pic.d --- binutils-2.9.5.0.41/gas/testsuite/gas/mips/jal-svr4pic.d Thu Jun 3 11:02:03 1999 +++ binutils-2.9.5.0.42/gas/testsuite/gas/mips/jal-svr4pic.d Fri May 12 08:04:32 2000 @@ -30,10 +30,17 @@ Disassembly of section .text: 0+0040 <[^>]*> lw \$gp,0\(\$sp\) 0+0044 <[^>]*> nop 0+0048 <[^>]*> lw \$t9,0\(\$gp\) -[ ]*48: R_MIPS_CALL16 external_text_label +[ ]*48: R_MIPS_CALL16 weak_text_label 0+004c <[^>]*> nop 0+0050 <[^>]*> jalr \$t9 0+0054 <[^>]*> nop 0+0058 <[^>]*> lw \$gp,0\(\$sp\) -0+005c <[^>]*> b 0+0000 +0+005c <[^>]*> nop +0+0060 <[^>]*> lw \$t9,0\(\$gp\) +[ ]*60: R_MIPS_CALL16 external_text_label +0+0064 <[^>]*> nop +0+0068 <[^>]*> jalr \$t9 +0+006c <[^>]*> nop +0+0070 <[^>]*> lw \$gp,0\(\$sp\) +0+0074 <[^>]*> b 0+0000 ... diff -upr --new-file binutils-2.9.5.0.41/gas/testsuite/gas/mips/jal-svr4pic.s binutils-2.9.5.0.42/gas/testsuite/gas/mips/jal-svr4pic.s --- binutils-2.9.5.0.41/gas/testsuite/gas/mips/jal-svr4pic.s Thu Jun 3 11:02:03 1999 +++ binutils-2.9.5.0.42/gas/testsuite/gas/mips/jal-svr4pic.s Fri May 12 08:04:32 2000 @@ -1,5 +1,7 @@ # Source file used to test the jal macro with -KPIC code. +.weak weak_text_label + text_label: .set noreorder .cpload $25 @@ -8,13 +10,12 @@ text_label: jal $25 jal $4,$25 jal text_label + jal weak_text_label jal external_text_label - + # Test j as well j text_label # Round to a 16 byte boundary, for ease in testing multiple targets. - nop - nop nop nop diff -upr --new-file binutils-2.9.5.0.41/gas/testsuite/gas/mips/jal-xgot.d binutils-2.9.5.0.42/gas/testsuite/gas/mips/jal-xgot.d --- binutils-2.9.5.0.41/gas/testsuite/gas/mips/jal-xgot.d Thu Jun 3 11:02:03 1999 +++ binutils-2.9.5.0.42/gas/testsuite/gas/mips/jal-xgot.d Fri May 12 08:04:32 2000 @@ -30,13 +30,22 @@ Disassembly of section .text: 0+003c <[^>]*> nop 0+0040 <[^>]*> lw \$gp,0\(\$sp\) 0+0044 <[^>]*> lui \$t9,0x0 -[ ]*44: R_MIPS_CALL_HI16 external_text_label +[ ]*44: R_MIPS_CALL_HI16 weak_text_label 0+0048 <[^>]*> addu \$t9,\$t9,\$gp 0+004c <[^>]*> lw \$t9,0\(\$t9\) -[ ]*4c: R_MIPS_CALL_LO16 external_text_label +[ ]*4c: R_MIPS_CALL_LO16 weak_text_label 0+0050 <[^>]*> nop 0+0054 <[^>]*> jalr \$t9 0+0058 <[^>]*> nop 0+005c <[^>]*> lw \$gp,0\(\$sp\) -0+0060 <[^>]*> b 0+0000 +0+0060 <[^>]*> lui \$t9,0x0 +[ ]*60: R_MIPS_CALL_HI16 external_text_label +0+0064 <[^>]*> addu \$t9,\$t9,\$gp +0+0068 <[^>]*> lw \$t9,0\(\$t9\) +[ ]*68: R_MIPS_CALL_LO16 external_text_label +0+006c <[^>]*> nop +0+0070 <[^>]*> jalr \$t9 +0+0074 <[^>]*> nop +0+0078 <[^>]*> lw \$gp,0\(\$sp\) +0+007c <[^>]*> b 0+0000 ... diff -upr --new-file binutils-2.9.5.0.41/gas/testsuite/gas/mips/mips.exp binutils-2.9.5.0.42/gas/testsuite/gas/mips/mips.exp --- binutils-2.9.5.0.41/gas/testsuite/gas/mips/mips.exp Sun Mar 12 09:33:02 2000 +++ binutils-2.9.5.0.42/gas/testsuite/gas/mips/mips.exp Fri May 12 08:04:33 2000 @@ -3,9 +3,9 @@ # if [istarget mips*-*-*] then { set no_mips16 0 - set svr4pic [expr [istarget *-*-elf*] || [istarget *-*-irix5*] || [istarget *-*-irix6* ] ] + set svr4pic [expr [istarget *-*-elf*] || [istarget *-*-irix5*] || [istarget *-*-irix6* ] || [istarget *-*-linux*] ] set empic [expr [istarget *-*-ecoff*] || [istarget *-*-ultrix*] || [istarget *-*-irix\[1-4\]*] ] - set aout [expr [istarget *-*-bsd*] || [istarget *-*-netbsd*] || [istarget *-*-openbsd*]] + set aout [expr [istarget *-*-bsd*] || [istarget *-*-netbsd*] || [istarget *-*-openbsd*] ] set ilocks [istarget mipstx39*-*-*] set gpr_ilocks [expr [istarget mipstx39*-*-*]] set addr32 [expr [istarget mipstx39*-*-*]] diff -upr --new-file binutils-2.9.5.0.41/gas/testsuite/gas/mri/float.d binutils-2.9.5.0.42/gas/testsuite/gas/mri/float.d --- binutils-2.9.5.0.41/gas/testsuite/gas/mri/float.d Thu Jun 3 11:02:04 1999 +++ binutils-2.9.5.0.42/gas/testsuite/gas/mri/float.d Fri May 12 08:04:35 2000 @@ -5,6 +5,6 @@ # Test MRI floating point constants S0.* -S118....(123456789ABCDEF03F800000412000004120000042)|(F0DEBC9A785634120000803F000020410000204100).* -S10.....(C80000)|(00C842).* +S113....(123456789ABCDEF03F80000041200000)|(F0DEBC9A785634120000803F00002041).* +S10.....(4120000042C80000)|(000020410000C842).* #pass diff -upr --new-file binutils-2.9.5.0.41/include/ChangeLog binutils-2.9.5.0.42/include/ChangeLog --- binutils-2.9.5.0.41/include/ChangeLog Tue May 2 10:07:50 2000 +++ binutils-2.9.5.0.42/include/ChangeLog Fri May 12 08:03:58 2000 @@ -1,3 +1,11 @@ +2000-05-08 Alan Modra + + * dis-asm.h (print_insn_tic54x): Declare. + +Fri May 5 16:51:03 2000 Clinton Popetz + + * coff/rs6k64.h (U802TOC64MAGIC): Change to U803XTOCMAGIC. + Mon Apr 24 15:20:51 2000 Clinton Popetz * include/coff/rs6k64.h: New file. diff -upr --new-file binutils-2.9.5.0.41/include/coff/rs6k64.h binutils-2.9.5.0.42/include/coff/rs6k64.h --- binutils-2.9.5.0.41/include/coff/rs6k64.h Tue May 2 10:07:55 2000 +++ binutils-2.9.5.0.42/include/coff/rs6k64.h Fri May 12 08:04:00 2000 @@ -14,9 +14,9 @@ struct external_filehdr { }; /* IBM RS/6000 */ -#define U802TOC64MAGIC 0757 /* readonly text segments and TOC, XCOFF64 */ +#define U803XTOCMAGIC 0757 /* readonly text segments and TOC, XCOFF64 */ -#define BADMAG(x) ((x).f_magic != U802TOC64MAGIC) +#define BADMAG(x) ((x).f_magic != U803XTOCMAGIC) #define FILHDR struct external_filehdr #define FILHSZ 24 @@ -49,11 +49,11 @@ typedef struct unsigned char entry[8]; /* entry pt. */ unsigned char o_maxstack[8]; /* max stack size (??) */ unsigned char o_maxdata[8]; /* max data size (??) */ - unsigned char o_resv3[116]; /* reserved */ + unsigned char o_resv3[16]; /* reserved */ } AOUTHDR; -#define AOUTSZ 220 +#define AOUTSZ 120 #define SMALL_AOUTSZ (0) #define AOUTHDRSZ 72 diff -upr --new-file binutils-2.9.5.0.41/include/dis-asm.h binutils-2.9.5.0.42/include/dis-asm.h --- binutils-2.9.5.0.41/include/dis-asm.h Sun Apr 23 09:48:02 2000 +++ binutils-2.9.5.0.42/include/dis-asm.h Fri May 12 08:11:30 2000 @@ -193,6 +193,7 @@ extern int print_insn_d30v PARAMS ((bfd extern int print_insn_v850 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_tic30 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_vax PARAMS ((bfd_vma, disassemble_info*)); +extern int print_insn_tic54x PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_tic80 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_pj PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_avr PARAMS ((bfd_vma, disassemble_info*)); diff -upr --new-file binutils-2.9.5.0.41/include/opcode/ChangeLog binutils-2.9.5.0.42/include/opcode/ChangeLog --- binutils-2.9.5.0.41/include/opcode/ChangeLog Tue May 2 10:07:59 2000 +++ binutils-2.9.5.0.42/include/opcode/ChangeLog Fri May 12 08:04:03 2000 @@ -1,3 +1,12 @@ +2000-05-04 Timothy Wall + + * tic54x.h: New. + +2000-05-03 J.T. Conklin + + * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit. + (PPC_OPERAND_VR): New operand flag for vector registers. + 2000-05-01 Kazu Hirata * h8300.h (EOP): Add missing initializer. diff -upr --new-file binutils-2.9.5.0.41/include/opcode/ppc.h binutils-2.9.5.0.42/include/opcode/ppc.h --- binutils-2.9.5.0.41/include/opcode/ppc.h Thu Jun 3 11:02:09 1999 +++ binutils-2.9.5.0.42/include/opcode/ppc.h Fri May 12 08:04:04 2000 @@ -88,6 +88,9 @@ extern const int powerpc_num_opcodes; /* Opcode is supported as part of the 64-bit bridge. */ #define PPC_OPCODE_64_BRIDGE (0400) +/* Opcode is supported by Altivec Vector Unit */ +#define PPC_OPCODE_ALTIVEC (01000) + /* A macro to extract the major opcode from an instruction. */ #define PPC_OP(i) (((i) >> 26) & 0x3f) @@ -221,6 +224,11 @@ extern const struct powerpc_operand powe number is allowed). This flag will only be set for a signed operand. */ #define PPC_OPERAND_NEGATIVE (04000) + +/* This operand names a vector unit register. The disassembler + prints these with a leading 'v'. */ +#define PPC_OPERAND_VR (010000) + /* The POWER and PowerPC assemblers use a few macros. We keep them with the operands table for simplicity. The macro table is an diff -upr --new-file binutils-2.9.5.0.41/include/opcode/tic54x.h binutils-2.9.5.0.42/include/opcode/tic54x.h --- binutils-2.9.5.0.41/include/opcode/tic54x.h Wed Dec 31 16:00:00 1969 +++ binutils-2.9.5.0.42/include/opcode/tic54x.h Fri May 12 08:04:04 2000 @@ -0,0 +1,167 @@ +/* tic54x.h -- Header file for TI TMS320C54X opcode table + Copyright 1999, 2000 Free Software Foundation, Inc. + Written by Timothy Wall (twall@cygnus.com) + +This file is part of GDB, GAS, and the GNU binutils. + +GDB, GAS, and the GNU binutils are free software; you can redistribute +them and/or modify them under the terms of the GNU General Public +License as published by the Free Software Foundation; either version +1, or (at your option) any later version. + +GDB, GAS, and the GNU binutils are distributed in the hope that they +will be useful, but WITHOUT ANY WARRANTY; without even the implied +warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See +the GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this file; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ + +#ifndef _TIC54X_H_ +#define _TIC54X_H_ + +typedef struct _symbol +{ + const char *name; + unsigned short value; +} symbol; + +enum optype { + OPT = 0x8000, + OP_None = 0x0, + + OP_Xmem, /* AR3 or AR4, indirect */ + OP_Ymem, /* AR3 or AR4, indirect */ + OP_pmad, /* PROG mem, direct */ + OP_dmad, /* DATA mem, direct */ + OP_Smem, + OP_Lmem, /* 32-bit single-addressed (direct/indirect) */ + OP_MMR, + OP_PA, + OP_Sind, + OP_xpmad, + OP_xpmad_ms7, + OP_MMRX, + OP_MMRY, + + OP_SRC1, /* src accumulator in bit 8 */ + OP_SRC, /* src accumulator in bit 9 */ + OP_RND, /* rounded result dst accumulator, opposite of bit 8 */ + OP_DST, /* dst accumulator in bit 8 */ + OP_ARX, /* arX in bits 0-3 */ + OP_SHIFT, /* -16 to 15 (SHIFT), bits 0-4 */ + OP_SHFT, /* 0 to 15 (SHIFT1 in summary), bits 0-3 */ + OP_B, /* ACC B only */ + OP_A, /* ACC A only */ + + OP_lk, /* 16-bit immediate, '#' optional */ + OP_TS, + OP_k8, /* -128 <= k <= 128 */ + OP_16, /* literal "16" */ + OP_BITC, /* 0 to 16 */ + OP_CC, /* condition code */ + OP_CC2, /* 4-bit condition code */ + OP_CC3, /* 2-bit condition code */ + OP_123, /* 1, 2, or 3 */ + OP_031, /* 0-31, numeric */ + OP_k5, /* 0 to 31 */ + OP_k8u, /* 0 to 255 */ + OP_ASM, /* "ASM" */ + OP_T, /* "T" */ + OP_DP, /* "DP" */ + OP_ARP, /* "ARP" */ + OP_k3, /* 0-7 */ + OP_lku, /* 0 to 65535 */ + OP_N, /* 0/1 or ST0/ST1 */ + OP_SBIT, /* status bit or 0-15 */ + OP_12, /* one or two */ + OP_k9, /* 9 bits of data page (DP) address */ + OP_TRN, /* "TRN" */ + +}; + +typedef struct _template +{ + /* The opcode mnemonic */ + const char *name; + + unsigned int words; /* insn size in words */ + int minops, maxops; /* min/max operand count */ + /* The significant bits in the opcode. Other bits are zero. + Instructions with more than 16 bits of opcode store the rest in the upper + 16 bits. + */ + unsigned short opcode; +#define INDIRECT(OP) ((OP)&0x80) +#define MOD(OP) (((OP)>>3)&0xF) +#define ARF(OP) ((OP)&0x7) +#define IS_LKADDR(OP) (INDIRECT(OP) && MOD(OP)>=12) +#define SRC(OP) ((OP)&0x200) +#define DST(OP) ((OP)&0x100) +#define SRC1(OP) ((OP)&0x100) +#define SHIFT(OP) (((OP)&0x10)?(((OP)&0x1F)-32):((OP)&0x1F)) +#define SHFT(OP) ((OP)&0xF) +#define ARX(OP) ((OP)&0x7) +#define XMEM(OP) (((OP)&0x00F0)>>4) +#define YMEM(OP) ((OP)&0x000F) +#define XMOD(C) (((C)&0xC)>>2) +#define XARX(C) (((C)&0x3)+2) +#define CC3(OP) (((OP)>>8)&0x3) +#define SBIT(OP) ((OP)&0xF) +#define MMR(OP) ((OP)&0x7F) +#define MMRX(OP) ((((OP)>>4)&0xF)+16) +#define MMRY(OP) (((OP)&0xF)+16) + +#define OPTYPE(X) ((X)&~OPT) + + /* Ones in this mask indicate which bits must match the opcode field. + Zeroes indicate don't care bits (operands and/or opcode options) */ + unsigned short mask; + + /* An array of operand codes (at most 4 operands) */ +#define MAX_OPERANDS 4 + enum optype operand_types[MAX_OPERANDS]; + + /* Special purpose flags (e.g. branch type, parallel, delay, etc) + */ + unsigned short flags; +#define B_NEXT 0 /* normal execution, next insn is next address */ +#define B_BRANCH 1 /* next insn is in opcode */ +#define B_RET 2 /* next insn is on stack */ +#define B_BACC 3 /* next insn is in acc */ +#define B_REPEAT 4 /* next insn repeats */ +#define FL_BMASK 0x07 + +#define FL_DELAY 0x10 /* instruction uses delay slots */ +#define FL_EXT 0x20 /* instruction takes two words */ +#define FL_FAR 0x40 /* far mode addressing */ +#define FL_LP 0x80 /* LP-only instruction */ +#define FL_NR 0x100 /* no repeat allowed */ +#define FL_SMR 0x200 /* Smem read (for flagging write-only *+ARx */ + + unsigned short opcode2, mask2; /* some insns have an extended opcode */ + +} template; + +typedef struct _partemplate { + char *name; + char *parname; + unsigned int words; /* length in words */ + int minops, maxops; /* min/max operand count for 2nd part of insn */ + unsigned short opcode; + unsigned short mask; + enum optype operand_types[MAX_OPERANDS]; + enum optype paroperand_types[MAX_OPERANDS]; +} partemplate; + +extern const template tic54x_unknown_opcode; +extern const template tic54x_optab[]; +extern const partemplate tic54x_paroptab[]; +extern const symbol mmregs[], regs[]; +extern const symbol condition_codes[], cc2_codes[], status_bits[]; +extern const symbol cc3_codes[]; +extern const char *misc_symbols[]; + +#endif /* TIC54X_H */ diff -upr --new-file binutils-2.9.5.0.41/ld/ChangeLog binutils-2.9.5.0.42/ld/ChangeLog --- binutils-2.9.5.0.41/ld/ChangeLog Tue May 2 10:09:22 2000 +++ binutils-2.9.5.0.42/ld/ChangeLog Fri May 12 08:04:44 2000 @@ -1,3 +1,14 @@ +2000-05-10 H.J. Lu + + * ldlang.c (open_input_bfds): Don't load the same file within + a group again if the whole archive has been loaded already. + +2000-05-03 Alan Modra + + From Ulf Carlsson and Andreas Jaeger + * lexsup.c (set_section_start): Use bfd_scan_vma rather than + strtoul. + Mon May 1 17:34:34 2000 Jim Wilson * configure.host (ia64-*-linux-gnu*): Change gcc to ${CC}. diff -upr --new-file binutils-2.9.5.0.41/ld/ldlang.c binutils-2.9.5.0.42/ld/ldlang.c --- binutils-2.9.5.0.41/ld/ldlang.c Tue May 2 10:23:29 2000 +++ binutils-2.9.5.0.42/ld/ldlang.c Fri May 12 08:11:30 2000 @@ -1864,8 +1864,10 @@ open_input_bfds (s, force) /* If we are being called from within a group, and this is an archive which has already been searched, then - force it to be researched. */ + force it to be researched unless the whole archive + has been loaded already. */ if (force + && !s->input_statement.whole_archive && s->input_statement.loaded && bfd_check_format (s->input_statement.the_bfd, bfd_archive)) diff -upr --new-file binutils-2.9.5.0.41/ld/lexsup.c binutils-2.9.5.0.42/ld/lexsup.c --- binutils-2.9.5.0.41/ld/lexsup.c Thu Apr 13 08:01:38 2000 +++ binutils-2.9.5.0.42/ld/lexsup.c Fri May 12 08:11:30 2000 @@ -1,5 +1,5 @@ /* Parse options for the GNU linker. - Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 1999 + Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation, Inc. This file is part of GLD, the Gnu Linker. @@ -1071,8 +1071,8 @@ static void set_section_start (sect, valstr) char *sect, *valstr; { - char *end; - unsigned long val = strtoul (valstr, &end, 16); + const char *end; + bfd_vma val = bfd_scan_vma (valstr, &end, 16); if (*end) einfo (_("%P%F: invalid hex number `%s'\n"), valstr); lang_section_start (sect, exp_intop (val)); diff -upr --new-file binutils-2.9.5.0.41/ld/testsuite/ChangeLog.linux binutils-2.9.5.0.42/ld/testsuite/ChangeLog.linux --- binutils-2.9.5.0.41/ld/testsuite/ChangeLog.linux Tue Feb 29 11:15:15 2000 +++ binutils-2.9.5.0.42/ld/testsuite/ChangeLog.linux Thu May 4 08:47:08 2000 @@ -0,0 +1,17 @@ +2000-05-04 H.J. Lu (hjl@gnu.org) + + * ld-elfvsb/elfvsb.exp (visibility_run): Mark all "protected" + tests "expected to fail." + +2000-05-03 H.J. Lu (hjl@gnu.org) + + * lib/ld-lib.exp (default_ld_link): Redirect the linker output + to link_output and make it global. + + * ld-elfvsb/elf-offset.ld: New. ELF visibility fearture + tests. + * ld-elfvsb/elfvsb.dat: Likewise. + * ld-elfvsb/elfvsb.exp: Likewise. + * ld-elfvsb/main.c: Likewise. + * ld-elfvsb/sh1.c: Likewise. + * ld-elfvsb/sh2.c: Likewise. diff -upr --new-file binutils-2.9.5.0.41/ld/testsuite/ld-elfvsb/elf-offset.ld binutils-2.9.5.0.42/ld/testsuite/ld-elfvsb/elf-offset.ld --- binutils-2.9.5.0.41/ld/testsuite/ld-elfvsb/elf-offset.ld Wed Dec 31 16:00:00 1969 +++ binutils-2.9.5.0.42/ld/testsuite/ld-elfvsb/elf-offset.ld Thu May 4 08:29:21 2000 @@ -0,0 +1,168 @@ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = 0x100000; + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.text : + { + *(.rel.text) + *(.rel.text.*) + *(.rel.gnu.linkonce.t*) + } + .rela.text : + { + *(.rela.text) + *(.rela.text.*) + *(.rela.gnu.linkonce.t*) + } + .rel.data : + { + *(.rel.data) + *(.rel.data.*) + *(.rel.gnu.linkonce.d*) + } + .rela.data : + { + *(.rela.data) + *(.rela.data.*) + *(.rela.gnu.linkonce.d*) + } + .rel.rodata : + { + *(.rel.rodata) + *(.rel.rodata.*) + *(.rel.gnu.linkonce.r*) + } + .rela.rodata : + { + *(.rela.rodata) + *(.rela.rodata.*) + *(.rela.gnu.linkonce.r*) + } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { KEEP (*(.init)) } + .plt : { *(.plt) } + .text : + { + *(.text) + *(.text.*) + *(.stub) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.gnu.linkonce.t*) + } + _etext = .; + PROVIDE (etext = .); + .fini : { KEEP (*(.fini)) } =0x9090 + .rodata : + { + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r*) + } + .rodata1 : { *(.rodata1) } + /* Adjust the address for the data segment. We want to adjust up to + the same address within the page on the next page up. */ + . = ALIGN(0x1000) + (. & (0x1000 - 1)); + .data : + { + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + SORT(CONSTRUCTORS) + } + .data1 : { *(.data1) } + .ctors : + { + /* gcc uses crtbegin.o to find the start of the constructors, so + we make sure it is first. Because this is a wildcard, it + doesn't matter if the user does not actually link against + crtbegin.o; the linker won't look for a file to match a + wildcard. The wildcard also means that it doesn't matter which + directory crtbegin.o is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } + .dtors : + { + KEEP (*crtbegin.o(.dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } + .got : { *(.got.plt) *(.got) } + .dynamic : { *(.dynamic) } + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + .sdata : { *(.sdata) *(.sdata.*) } + _edata = .; + PROVIDE (edata = .); + __bss_start = .; + .sbss : { *(.sbss) *(.scommon) } + .bss : + { + *(.dynbss) + *(.bss) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(32 / 8); + } + . = ALIGN(32 / 8); + _end = . ; + PROVIDE (end = .); + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + /* These must appear regardless of . */ +} diff -upr --new-file binutils-2.9.5.0.41/ld/testsuite/ld-elfvsb/elfvsb.dat binutils-2.9.5.0.42/ld/testsuite/ld-elfvsb/elfvsb.dat --- binutils-2.9.5.0.41/ld/testsuite/ld-elfvsb/elfvsb.dat Wed Dec 31 16:00:00 1969 +++ binutils-2.9.5.0.42/ld/testsuite/ld-elfvsb/elfvsb.dat Thu May 4 08:29:21 2000 @@ -0,0 +1,19 @@ +mainvar == 1 +overriddenvar == 2 +shlibvar1 == 3 +shlib_mainvar () == 1 +shlib_overriddenvar () == 2 +shlib_shlibvar1 () == 3 +shlib_shlibvar2 () == 4 +shlib_shlibcall () == 5 +shlib_shlibcall2 () == 8 +shlib_maincall () == 6 +main_called () == 6 +shlib_checkfunptr1 (shlib_shlibvar1) == 1 +shlib_checkfunptr2 (main_called) == 1 +shlib_getfunptr1 () == shlib_shlibvar1 +shlib_getfunptr2 () == main_called +shlib_check () == 1 +visibility_check () == 1 +visibility_checkfunptr () == 1 +main_visibility_check () == 1 diff -upr --new-file binutils-2.9.5.0.41/ld/testsuite/ld-elfvsb/elfvsb.exp binutils-2.9.5.0.42/ld/testsuite/ld-elfvsb/elfvsb.exp --- binutils-2.9.5.0.41/ld/testsuite/ld-elfvsb/elfvsb.exp Wed Dec 31 16:00:00 1969 +++ binutils-2.9.5.0.42/ld/testsuite/ld-elfvsb/elfvsb.exp Thu May 4 08:47:10 2000 @@ -0,0 +1,298 @@ +# Expect script for ld-visibility tests +# Copyright (C) 2000 Free Software Foundation +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Written by Ian Lance Taylor (ian@cygnus.com) +# and H.J. Lu (hjl@gnu.org) +# + +# Make sure that ld can generate ELF shared libraries with visibility. + +# This test can only be run if ld generates native executables. +if ![isnative] then {return} + +# This test can only be run on a couple of ELF platforms. +# Square bracket expressions seem to confuse istarget. +if { ![istarget i386-*-linux*] \ + && ![istarget i486-*-linux*] \ + && ![istarget i586-*-linux*] \ + && ![istarget i686-*-linux*] \ + && ![istarget m68k-*-linux*] \ + && ![istarget powerpc-*-linux*] \ + && ![istarget sparc*-*-linux*] } { + return +} + +if { [istarget *-*-linux*aout*] \ + || [istarget *-*-linux*oldld*] } { + return +} + +set tmpdir tmpdir +set SHCFLAG "" + +if { [istarget rs6000*-*-aix*] || [istarget powerpc*-*-aix*] } { + + # AIX shared libraries do not seem to support useful features, + # like overriding the shared library function or letting the + # shared library refer to objects defined in the main program. We + # avoid testing those features. + set SHCFLAG "-DXCOFF_TEST" + + # The AIX 3.2.5 loader appears to randomly fail when loading + # shared libraries from NSF mounted partitions, so we avoid any + # potential problems by using a local directory. + catch {exec /bin/sh -c "echo $$"} pid + set tmpdir /usr/tmp/ld.$pid + catch "exec mkdir $tmpdir" exec_status + + # On AIX, we need to explicitly export the symbols the shared + # library is going to provide, and need. + set file [open $tmpdir/xcoff.exp w] + puts $file shlibvar1 + puts $file shlibvar2 + puts $file shlib_shlibvar1 + puts $file shlib_shlibvar2 + puts $file shlib_shlibcall + puts $file shlib_shlibcalled + puts $file shlib_checkfunptr1 + puts $file shlib_getfunptr1 + puts $file shlib_check + close $file +} + +# The test procedure. +proc visibility_test { visibility progname testname main sh1 sh2 dat args } { + global ld + global srcdir + global subdir + global exec_output + global link_output + global host_triplet + global tmpdir + + if [llength $args] { set shldflags [lindex $args 0] } else { set shldflags "" } + + # Build the shared library. + # On AIX, we need to use an export file. + set shared -shared + if { [istarget rs6000*-*-aix*] || [istarget powerpc*-*-aix*] } { + set shared "-bM:SRE -bE:$tmpdir/xcoff.exp" + } + if {![ld_simple_link $ld $tmpdir/$progname.so "$shared $shldflags $tmpdir/$sh1 $tmpdir/$sh2"]} { + fail "$testname" + return + } + + # Link against the shared library. Use -rpath so that the + # dynamic linker can locate the shared library at runtime. + # On AIX, we must include /lib in -rpath, as otherwise the loader + # can not find -lc. + set rpath $tmpdir + if { [istarget rs6000*-*-aix*] || [istarget powerpc*-*-aix*] } { + set rpath /lib:$tmpdir + } + if ![ld_link $ld $tmpdir/$progname "-rpath $rpath $tmpdir/$main $tmpdir/$progname.so"] { + if { [ string match $visibility "hidden" ] + && [string match "*/main.c*: undefined reference to \`visibility\'" $link_output] } { + pass "$testname" + } else { + fail "$testname" + } + return + } + + if [ string match $visibility "hidden" ] { + fail "$testname" + } + + # Run the resulting program + send_log "$tmpdir/$progname >$tmpdir/$progname.out\n" + verbose "$tmpdir/$progname >$tmpdir/$progname.out" + catch "exec $tmpdir/$progname >$tmpdir/$progname.out" exec_output + if ![string match "" $exec_output] then { + send_log "$exec_output\n" + verbose "$exec_output" + fail "$testname" + return + } + + send_log "diff $tmpdir/$progname.out $srcdir/$subdir/$dat.dat\n" + verbose "diff $tmpdir/$progname.out $srcdir/$subdir/$dat.dat" + catch "exec diff $tmpdir/$progname.out $srcdir/$subdir/$dat.dat" exec_output + set exec_output [prune_warnings $exec_output] + + if {![string match "" $exec_output]} then { + send_log "$exec_output\n" + verbose "$exec_output" + fail "$testname" + return + } + + pass "$testname" +} + +proc visibility_run {visibility} { + global CC + global CFLAGS + global SHCFLAG + global srcdir + global subdir + global tmpdir + global picflag + global target_triplet + + if [ string match $visibility "hidden" ] { + set VSBCFLAG "-DHIDDEN_TEST" + } else { if [ string match $visibility "hidden_normal" ] { + set VSBCFLAG "-DHIDDEN_NORMAL_TEST" + } else { if [ string match $visibility "protected" ] { + set VSBCFLAG "-DPROTECTED_TEST" + } else { + set VSBCFLAG "" + }}} + + # Compile the main program. + if ![ld_compile "$CC $CFLAGS $SHCFLAG $VSBCFLAG" $srcdir/$subdir/main.c $tmpdir/mainnp.o] { + unresolved "visibility ($visibility) (non PIC)" + unresolved "visibility ($visibility)" + } else { + # The shared library is composed of two files. First compile them + # without using -fpic. That should work on an ELF system, + # although it will be less efficient because the dynamic linker + # will need to do more relocation work. However, note that not + # using -fpic will cause some of the tests to return different + # results. + if { ![ld_compile "$CC $CFLAGS $SHCFLAG $VSBCFLAG" $srcdir/$subdir/sh1.c $tmpdir/sh1np.o] + || ![ld_compile "$CC $CFLAGS $SHCFLAG $VSBCFLAG" $srcdir/$subdir/sh2.c $tmpdir/sh2np.o] } { + unresolved "visibility ($visibility) (non PIC)" + } else { if { [istarget rs6000*-*-aix*] || [istarget powerpc*-*-aix*] } { + visibility_test $visibility vnp "visibility ($visibility) (nonPIC)" mainnp.o sh1np.o sh2np.o xcoff + } else { + # SunOS non PIC shared libraries don't permit some cases of + # overriding. + if [ string match $visibility "protected" ] { + setup_xfail $target_triplet + } else { + setup_xfail "*-*-sunos4*" + } + visibility_test $visibility vnp "visibility ($visibility) (non PIC)" mainnp.o sh1np.o sh2np.o elfvsb + + # Test ELF shared library relocations with a non-zero load + # address for the library. Near as I can tell, the R_*_RELATIVE + # relocations for various targets are broken in the case where + # the load address is not zero (which is the default). + if [ string match $visibility "protected" ] { + setup_xfail $target_triplet + } else { + setup_xfail "*-*-sunos4*" + setup_xfail "*-*-linux*libc1" + } + visibility_test $visibility vnp "visibility ($visibility) (non PIC, load offset)" \ + mainnp.o sh1np.o sh2np.o elfvsb \ + "-T $srcdir/$subdir/elf-offset.ld" + } } + + # Now compile the code using -fpic. + + if { ![ld_compile "$CC $CFLAGS $SHCFLAG $VSBCFLAG $picflag" $srcdir/$subdir/sh1.c $tmpdir/sh1p.o] + || ![ld_compile "$CC $CFLAGS $SHCFLAG $VSBCFLAG $picflag" $srcdir/$subdir/sh2.c $tmpdir/sh2p.o] } { + unresolved "visibility ($visibility)" + } else { + if [ string match $visibility "protected" ] { + setup_xfail $target_triplet + } + # SunOS can not compare function pointers correctly + if [istarget "*-*-sunos4*"] { + visibility_test $visibility vp "visibility ($visibility)" mainnp.o sh1p.o sh2p.o sun4 + } else { if { [istarget rs6000*-*-aix*] || [istarget powerpc*-*-aix*] } { + visibility_test $visibility vp "visibility ($visibility)" mainnp.o sh1p.o sh2p.o xcoff + } else { + visibility_test $visibility vp "visibility ($visibility)" mainnp.o sh1p.o sh2p.o elfvsb + } } + } + } + + # Now do the same tests again, but this time compile main.c PIC. + if ![ld_compile "$CC $CFLAGS $SHCFLAG $VSBCFLAG $picflag" $srcdir/$subdir/main.c $tmpdir/mainp.o] { + unresolved "visibility ($visibility) (PIC main, non PIC so)" + unresolved "visibility ($visibility) (PIC main)" + } else { + if { [file exists $tmpdir/sh1np.o ] && [ file exists $tmpdir/sh2np.o ] } { + if { [istarget rs6000*-*-aix*] || [istarget powerpc*-*-aix*] } { + visibility_test $visibility vmpnp "visibility ($visibility) (PIC main, non PIC so)" mainp.o sh1np.o sh2np.o xcoff + } else { + # SunOS non PIC shared libraries don't permit some cases of + # overriding. + if [ string match $visibility "protected" ] { + setup_xfail $target_triplet + } else { + setup_xfail "*-*-sunos4*" + } + visibility_test $visibility vmpnp "visibility ($visibility) (PIC main, non PIC so)" mainp.o sh1np.o sh2np.o elfvsb + } + } else { + unresolved "visibility (PIC main, non PIC so)" + } + + if { [file exists $tmpdir/sh1p.o ] && [ file exists $tmpdir/sh2p.o ] } { + if [ string match $visibility "protected" ] { + setup_xfail $target_triplet + } + if { [istarget rs6000*-*-aix*] || [istarget powerpc*-*-aix*] } { + visibility_test $visibility vmpp "visibility ($visibility) (PIC main)" mainp.o sh1p.o sh2p.o xcoff + } else { + visibility_test $visibility vmpp "visibility ($visibility) (PIC main)" mainp.o sh1p.o sh2p.o elfvsb + } + } else { + unresolved "visibility ($visibility) (PIC main)" + } + } +} + +if [istarget mips*-*-*] { + set picflag "" +} else { + # Unfortunately, the gcc argument is -fpic and the cc argument is + # -KPIC. We have to try both. + set picflag "-fpic" + send_log "$CC $picflag\n" + verbose "$CC $picflag" + catch "exec $CC $picflag" exec_output + send_log "$exec_output\n" + verbose "--" "$exec_output" + if { [string match "*illegal option*" $exec_output] \ + || [string match "*option ignored*" $exec_output] \ + || [string match "*unrecognized option*" $exec_output] \ + || [string match "*passed to ld*" $exec_output] } { + if [istarget *-*-sunos4*] { + set picflag "-pic" + } else { + set picflag "-KPIC" + } + } +} +verbose "Using $picflag to compile PIC code" + +visibility_run hidden +visibility_run hidden_normal +visibility_run protected +visibility_run normal + +if { [istarget rs6000*-*-aix*] || [istarget powerpc*-*-aix*] } { + # Remove the temporary directory. + catch "exec rm -rf $tmpdir" exec_status +} diff -upr --new-file binutils-2.9.5.0.41/ld/testsuite/ld-elfvsb/main.c binutils-2.9.5.0.42/ld/testsuite/ld-elfvsb/main.c --- binutils-2.9.5.0.41/ld/testsuite/ld-elfvsb/main.c Wed Dec 31 16:00:00 1969 +++ binutils-2.9.5.0.42/ld/testsuite/ld-elfvsb/main.c Thu May 4 08:29:21 2000 @@ -0,0 +1,104 @@ +/* This is the main program for the shared library test. */ + +#include + +int mainvar = 1; +int overriddenvar = 2; +extern int shlibvar1; + +extern int shlib_mainvar (); +extern int shlib_overriddenvar (); +extern int shlib_shlibvar1 (); +extern int shlib_shlibvar2 (); +extern int shlib_shlibcall (); +extern int shlib_maincall (); +extern int shlib_checkfunptr1 (); +extern int shlib_checkfunptr2 (); +extern int (*shlib_getfunptr1 ()) (); +extern int (*shlib_getfunptr2 ()) (); +extern int shlib_check (); +extern int shlib_shlibcall2 (); +extern int visibility (); +extern int visibility_check (); +extern int visibility_checkfunptr (); +extern void *visibility_funptr (); + +#if !defined (HIDDEN_TEST) && defined (PROTECTED_TEST) +int +visibility () +{ + return 1; +} +#endif + +static int +main_visibility_check () +{ + return visibility_funptr () == visibility; +} + +/* This function is called by the shared library. */ + +int +main_called () +{ + return 6; +} + +/* This function overrides a function in the shared library. */ + +int +shlib_overriddencall2 () +{ + return 8; +} + +int +main () +{ + int (*p) (); + + printf ("mainvar == %d\n", mainvar); + printf ("overriddenvar == %d\n", overriddenvar); + printf ("shlibvar1 == %d\n", shlibvar1); +#ifndef XCOFF_TEST + printf ("shlib_mainvar () == %d\n", shlib_mainvar ()); + printf ("shlib_overriddenvar () == %d\n", shlib_overriddenvar ()); +#endif + printf ("shlib_shlibvar1 () == %d\n", shlib_shlibvar1 ()); + printf ("shlib_shlibvar2 () == %d\n", shlib_shlibvar2 ()); + printf ("shlib_shlibcall () == %d\n", shlib_shlibcall ()); +#ifndef XCOFF_TEST + printf ("shlib_shlibcall2 () == %d\n", shlib_shlibcall2 ()); + printf ("shlib_maincall () == %d\n", shlib_maincall ()); +#endif + printf ("main_called () == %d\n", main_called ()); + printf ("shlib_checkfunptr1 (shlib_shlibvar1) == %d\n", + shlib_checkfunptr1 (shlib_shlibvar1)); +#ifndef XCOFF_TEST + printf ("shlib_checkfunptr2 (main_called) == %d\n", + shlib_checkfunptr2 (main_called)); +#endif + p = shlib_getfunptr1 (); + printf ("shlib_getfunptr1 () "); + if (p == shlib_shlibvar1) + printf ("=="); + else + printf ("!="); + printf (" shlib_shlibvar1\n"); +#ifndef XCOFF_TEST + p = shlib_getfunptr2 (); + printf ("shlib_getfunptr2 () "); + if (p == main_called) + printf ("=="); + else + printf ("!="); + printf (" main_called\n"); +#endif + printf ("shlib_check () == %d\n", shlib_check ()); + printf ("visibility_check () == %d\n", visibility_check ()); + printf ("visibility_checkfunptr () == %d\n", + visibility_checkfunptr ()); + printf ("main_visibility_check () == %d\n", main_visibility_check ()); + return 0; +} diff -upr --new-file binutils-2.9.5.0.41/ld/testsuite/ld-elfvsb/sh1.c binutils-2.9.5.0.42/ld/testsuite/ld-elfvsb/sh1.c --- binutils-2.9.5.0.41/ld/testsuite/ld-elfvsb/sh1.c Wed Dec 31 16:00:00 1969 +++ binutils-2.9.5.0.42/ld/testsuite/ld-elfvsb/sh1.c Thu May 4 08:29:21 2000 @@ -0,0 +1,215 @@ +/* This is part of the shared library ld test. This file becomes part + of a shared library. */ + +/* This variable is supplied by the main program. */ +#ifndef XCOFF_TEST +extern int mainvar; +#endif + +/* This variable is defined in the shared library, and overridden by + the main program. */ +#ifndef XCOFF_TEST +int overriddenvar = -1; +#endif + +/* This variable is defined in the shared library. */ +int shlibvar1 = 3; + +/* This variable is defined by another object in the shared library. */ +extern int shlibvar2; + +/* These functions return the values of the above variables as seen in + the shared library. */ + +#ifndef XCOFF_TEST +int +shlib_mainvar () +{ + return mainvar; +} +#endif + +#ifndef XCOFF_TEST +int +shlib_overriddenvar () +{ + return overriddenvar; +} +#endif + +int +shlib_shlibvar1 () +{ + return shlibvar1; +} + +int +shlib_shlibvar2 () +{ + return shlibvar2; +} + +/* This function calls a function defined by another object in the + shared library. */ + +extern int shlib_shlibcalled (); + +int +shlib_shlibcall () +{ + return shlib_shlibcalled (); +} + +#ifndef XCOFF_TEST +/* This function calls a function defined in this object in the shared + library. The main program will override the called function. */ + +extern int shlib_overriddencall2 (); + +int +shlib_shlibcall2 () +{ + return shlib_overriddencall2 (); +} + +int +shlib_overriddencall2 () +{ + return 7; +} +#endif + +/* This function calls a function defined by the main program. */ + +#ifndef XCOFF_TEST +extern int main_called (); + +int +shlib_maincall () +{ + return main_called (); +} +#endif + +/* This function is passed a function pointer to shlib_mainvar. It + confirms that the pointer compares equally. */ + +int +shlib_checkfunptr1 (p) + int (*p) (); +{ + return p == shlib_shlibvar1; +} + +/* This function is passed a function pointer to main_called. It + confirms that the pointer compares equally. */ + +#ifndef XCOFF_TEST +int +shlib_checkfunptr2 (p) + int (*p) (); +{ + return p == main_called; +} +#endif + +/* This function returns a pointer to shlib_mainvar. */ + +int +(*shlib_getfunptr1 ()) () +{ + return shlib_shlibvar1; +} + +/* This function returns a pointer to main_called. */ + +#ifndef XCOFF_TEST +int +(*shlib_getfunptr2 ()) () +{ + return main_called; +} +#endif + +/* This function makes sure that constant data and local functions + work. */ + +#ifndef __STDC__ +#define const +#endif + +static int i = 6; +static const char *str = "Hello, world\n"; + +int +shlib_check () +{ + const char *s1, *s2; + + if (i != 6) + return 0; + + /* To isolate the test, don't rely on any external functions, such + as strcmp. */ + s1 = "Hello, world\n"; + s2 = str; + while (*s1 != '\0') + if (*s1++ != *s2++) + return 0; + if (*s2 != '\0') + return 0; + + if (shlib_shlibvar1 () != 3) + return 0; + + return 1; +} + +int +visibility () +{ + return 2; +} + +#ifdef HIDDEN_NORMAL_TEST +asm (".hidden visibility_normal"); + +int +visibility_normal () +{ + return 2; +} +#endif + +int +visibility_checkfunptr () +{ +#ifdef HIDDEN_NORMAL_TEST + int (*v) () = visibility_normal; +#else + int (*v) () = visibility; +#endif + return (*v) () == 2; +} + +int +visibility_check () +{ +#ifdef HIDDEN_NORMAL_TEST + return visibility_normal () == 2; +#else + return visibility () == 2; +#endif +} + +void * +visibility_funptr () +{ + return visibility; +} + +#ifdef HIDDEN_TEST +asm (".hidden visibility"); +#else +asm (".protected visibility"); +#endif diff -upr --new-file binutils-2.9.5.0.41/ld/testsuite/ld-elfvsb/sh2.c binutils-2.9.5.0.42/ld/testsuite/ld-elfvsb/sh2.c --- binutils-2.9.5.0.41/ld/testsuite/ld-elfvsb/sh2.c Wed Dec 31 16:00:00 1969 +++ binutils-2.9.5.0.42/ld/testsuite/ld-elfvsb/sh2.c Thu May 4 08:29:21 2000 @@ -0,0 +1,14 @@ +/* This is part of the shared library ld test. This file becomes part + of a shared library. */ + +/* This variable is defined here, and referenced by another file in + the shared library. */ +int shlibvar2 = 4; + +/* This function is called by another file in the shared library. */ + +int +shlib_shlibcalled () +{ + return 5; +} diff -upr --new-file binutils-2.9.5.0.41/ld/testsuite/lib/ld-lib.exp binutils-2.9.5.0.42/ld/testsuite/lib/ld-lib.exp --- binutils-2.9.5.0.41/ld/testsuite/lib/ld-lib.exp Sun Oct 10 12:44:46 1999 +++ binutils-2.9.5.0.42/ld/testsuite/lib/ld-lib.exp Thu May 4 08:29:24 2000 @@ -85,6 +85,7 @@ proc default_ld_link { ld target objects global HOSTING_LIBS global LIBS global host_triplet + global link_output set objs "$HOSTING_CRT0 $objects" set libs "$LIBS $HOSTING_LIBS" @@ -98,12 +99,12 @@ proc default_ld_link { ld target objects verbose -log "$ld $HOSTING_EMU $flags -o $target $objs $libs" - catch "exec $ld $HOSTING_EMU $flags -o $target $objs $libs" exec_output - set exec_output [prune_warnings $exec_output] - if [string match "" $exec_output] then { + catch "exec $ld $HOSTING_EMU $flags -o $target $objs $libs" link_output + set exec_output [prune_warnings $link_output] + if [string match "" $link_output] then { return 1 } else { - verbose -log "$exec_output" + verbose -log "$link_output" return 0 } } diff -upr --new-file binutils-2.9.5.0.41/opcodes/ChangeLog binutils-2.9.5.0.42/opcodes/ChangeLog --- binutils-2.9.5.0.41/opcodes/ChangeLog Tue May 2 10:06:32 2000 +++ binutils-2.9.5.0.42/opcodes/ChangeLog Fri May 12 08:03:06 2000 @@ -1,3 +1,42 @@ +2000-05-11 Ulf Carlsson + + * mips-dis.c (print_insn_arg): Don't mask top 32 bits of 64-bit + target addresses for 'jal' and 'j'. + +2000-05-10 Geoff Keating + + * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes + also available in common mode when powerpc syntax is being used. + +2000-05-08 Alan Modra + + * m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args. + (dummy_print_address): Ditto. + +2000-05-04 Timothy Wall + + * tic54x-opc.c: New. + * tic54x-dis.c: New. + * disassemble.c (disassembler): Add ARCH_tic54x. + * configure.in: Added tic54x target. + * configure: Ditto. + * Makefile.am: Add tic54x dependencies. + * Makefile.in: Ditto. + +2000-05-03 J.T. Conklin + + * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for + vector unit operands. + (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector + unit instruction formats. + (PPCVEC): New macro, mask for vector instructions. + (powerpc_operands): Add table entries for above operand types. + (powerpc_opcodes): Add table entries for vector instructions. + + * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask. + (print_insn_little_powerpc): Likewise. + (print_insn_powerpc): Prepend 'v' when printing vector registers. + Sun Apr 23 17:54:14 2000 Denis Chertykov * avr-dis.c (reg_fmul_d): New. Extract destination register from diff -upr --new-file binutils-2.9.5.0.41/opcodes/Makefile.am binutils-2.9.5.0.42/opcodes/Makefile.am --- binutils-2.9.5.0.41/opcodes/Makefile.am Sun Apr 23 09:48:03 2000 +++ binutils-2.9.5.0.42/opcodes/Makefile.am Fri May 12 08:11:30 2000 @@ -96,6 +96,8 @@ CFILES = \ sparc-dis.c \ sparc-opc.c \ tic30-dis.c \ + tic54x-dis.c \ + tic54x-opc.c \ tic80-dis.c \ tic80-opc.c \ v850-dis.c \ @@ -160,6 +162,8 @@ ALL_MACHINES = \ sparc-dis.lo \ sparc-opc.lo \ tic30-dis.lo \ + tic54x-dis.lo \ + tic54x-opc.lo \ tic80-dis.lo \ tic80-opc.lo \ v850-dis.lo \ @@ -399,6 +403,13 @@ m10300-opc.lo: m10300-opc.c sysdep.h con ns32k-dis.lo: ns32k-dis.c $(BFD_H) $(INCDIR)/ansidecl.h \ sysdep.h config.h $(INCDIR)/dis-asm.h $(INCDIR)/opcode/ns32k.h \ opintl.h +pj-dis.lo: pj-dis.c $(INCDIR)/opcode/pj.h $(INCDIR)/dis-asm.h \ + $(BFD_H) $(INCDIR)/ansidecl.h +pj-opc.lo: pj-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/pj.h +ppc-dis.lo: ppc-dis.c $(INCDIR)/ansidecl.h sysdep.h \ + config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/ppc.h +ppc-opc.lo: ppc-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/ppc.h \ + opintl.h pj-dis.lo: pj-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/pj.h $(INCDIR)/dis-asm.h $(BFD_H) pj-opc.lo: pj-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ @@ -416,6 +427,10 @@ sparc-opc.lo: sparc-opc.c sysdep.h confi $(INCDIR)/opcode/sparc.h tic30-dis.lo: tic30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/tic30.h +tic54x-dis.lo: tic54x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/tic54x.h +tic54x-opc.lo: tic54x-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/opcode/tic54x.h tic80-dis.lo: tic80-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/tic80.h $(INCDIR)/dis-asm.h $(BFD_H) tic80-opc.lo: tic80-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ diff -upr --new-file binutils-2.9.5.0.41/opcodes/Makefile.in binutils-2.9.5.0.42/opcodes/Makefile.in --- binutils-2.9.5.0.41/opcodes/Makefile.in Sun Apr 23 09:48:03 2000 +++ binutils-2.9.5.0.42/opcodes/Makefile.in Fri May 12 08:11:30 2000 @@ -200,6 +200,8 @@ CFILES = \ sparc-dis.c \ sparc-opc.c \ tic30-dis.c \ + tic54x-dis.c \ + tic54x-opc.c \ tic80-dis.c \ tic80-opc.c \ v850-dis.c \ @@ -265,6 +267,8 @@ ALL_MACHINES = \ sparc-dis.lo \ sparc-opc.lo \ tic30-dis.lo \ + tic54x-dis.lo \ + tic54x-opc.lo \ tic80-dis.lo \ tic80-opc.lo \ v850-dis.lo \ @@ -896,6 +900,13 @@ m10300-opc.lo: m10300-opc.c sysdep.h con ns32k-dis.lo: ns32k-dis.c $(BFD_H) $(INCDIR)/ansidecl.h \ sysdep.h config.h $(INCDIR)/dis-asm.h $(INCDIR)/opcode/ns32k.h \ opintl.h +pj-dis.lo: pj-dis.c $(INCDIR)/opcode/pj.h $(INCDIR)/dis-asm.h \ + $(BFD_H) $(INCDIR)/ansidecl.h +pj-opc.lo: pj-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/pj.h +ppc-dis.lo: ppc-dis.c $(INCDIR)/ansidecl.h sysdep.h \ + config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/ppc.h +ppc-opc.lo: ppc-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/ppc.h \ + opintl.h pj-dis.lo: pj-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/pj.h $(INCDIR)/dis-asm.h $(BFD_H) pj-opc.lo: pj-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ @@ -913,6 +924,10 @@ sparc-opc.lo: sparc-opc.c sysdep.h confi $(INCDIR)/opcode/sparc.h tic30-dis.lo: tic30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/tic30.h +tic54x-dis.lo: tic54x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/tic54x.h +tic54x-opc.lo: tic54x-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/opcode/tic54x.h tic80-dis.lo: tic80-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/tic80.h $(INCDIR)/dis-asm.h $(BFD_H) tic80-opc.lo: tic80-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ diff -upr --new-file binutils-2.9.5.0.41/opcodes/configure binutils-2.9.5.0.42/opcodes/configure --- binutils-2.9.5.0.41/opcodes/configure Tue May 2 10:23:32 2000 +++ binutils-2.9.5.0.42/opcodes/configure Fri May 12 08:11:30 2000 @@ -3963,6 +3963,7 @@ if test x${all_targets} = xfalse ; then bfd_sparc_arch) ta="$ta sparc-dis.lo sparc-opc.lo" ;; bfd_tahoe_arch) ;; bfd_tic30_arch) ta="$ta tic30-dis.lo" ;; + bfd_tic54x_arch) ta="$ta tic54x-dis.lo tic54x-opc.lo" ;; bfd_tic80_arch) ta="$ta tic80-dis.lo tic80-opc.lo" ;; bfd_v850_arch) ta="$ta v850-opc.lo v850-dis.lo" ;; bfd_v850e_arch) ta="$ta v850-opc.lo v850-dis.lo" ;; diff -upr --new-file binutils-2.9.5.0.41/opcodes/configure.in binutils-2.9.5.0.42/opcodes/configure.in --- binutils-2.9.5.0.41/opcodes/configure.in Tue May 2 10:23:32 2000 +++ binutils-2.9.5.0.42/opcodes/configure.in Fri May 12 08:11:30 2000 @@ -185,6 +185,7 @@ if test x${all_targets} = xfalse ; then bfd_sparc_arch) ta="$ta sparc-dis.lo sparc-opc.lo" ;; bfd_tahoe_arch) ;; bfd_tic30_arch) ta="$ta tic30-dis.lo" ;; + bfd_tic54x_arch) ta="$ta tic54x-dis.lo tic54x-opc.lo" ;; bfd_tic80_arch) ta="$ta tic80-dis.lo tic80-opc.lo" ;; bfd_v850_arch) ta="$ta v850-opc.lo v850-dis.lo" ;; bfd_v850e_arch) ta="$ta v850-opc.lo v850-dis.lo" ;; diff -upr --new-file binutils-2.9.5.0.41/opcodes/disassemble.c binutils-2.9.5.0.42/opcodes/disassemble.c --- binutils-2.9.5.0.41/opcodes/disassemble.c Tue May 2 10:23:32 2000 +++ binutils-2.9.5.0.42/opcodes/disassemble.c Fri May 12 08:11:30 2000 @@ -49,6 +49,7 @@ Foundation, Inc., 59 Temple Place - Suit #define ARCH_sh #define ARCH_sparc #define ARCH_tic30 +#define ARCH_tic54x #define ARCH_tic80 #define ARCH_v850 #define ARCH_vax @@ -238,6 +239,11 @@ disassembler (abfd) #ifdef ARCH_tic30 case bfd_arch_tic30: disassemble = print_insn_tic30; + break; +#endif +#ifdef ARCH_tic54x + case bfd_arch_tic54x: + disassemble = print_insn_tic54x; break; #endif #ifdef ARCH_tic80 diff -upr --new-file binutils-2.9.5.0.41/opcodes/m68k-dis.c binutils-2.9.5.0.42/opcodes/m68k-dis.c --- binutils-2.9.5.0.41/opcodes/m68k-dis.c Sun Apr 16 10:07:29 2000 +++ binutils-2.9.5.0.42/opcodes/m68k-dis.c Fri May 12 08:03:09 2000 @@ -1,5 +1,5 @@ /* Print Motorola 68k instructions. - Copyright 1986, 87, 89, 91, 92, 93, 94, 95, 96, 97, 98, 1999 + Copyright 1986, 87, 89, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation, Inc. This file is free software; you can redistribute it and/or modify @@ -151,16 +151,17 @@ fetch_data (info, addr) /* This function is used to print to the bit-bucket. */ static int #ifdef __STDC__ -dummy_printer (FILE * file, const char * format, ...) +dummy_printer (FILE * file ATTRIBUTE_UNUSED, + const char * format ATTRIBUTE_UNUSED, ...) #else -dummy_printer (file) FILE *file; +dummy_printer (file) FILE *file ATTRIBUTE_UNUSED; #endif { return 0; } static void dummy_print_address (vma, info) - bfd_vma vma; - struct disassemble_info *info; + bfd_vma vma ATTRIBUTE_UNUSED; + struct disassemble_info *info ATTRIBUTE_UNUSED; { } diff -upr --new-file binutils-2.9.5.0.41/opcodes/mips-dis.c binutils-2.9.5.0.42/opcodes/mips-dis.c --- binutils-2.9.5.0.41/opcodes/mips-dis.c Sun Apr 16 10:07:29 2000 +++ binutils-2.9.5.0.42/opcodes/mips-dis.c Fri May 12 08:03:10 2000 @@ -1,5 +1,6 @@ /* Print mips instructions for GDB, the GNU debugger, or for objdump. - Copyright (c) 1989, 91-97, 1998 Free Software Foundation, Inc. + Copyright (c) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000 + Free Software Foundation, Inc. Contributed by Nobuyuki Hikichi(hikichi@sra.co.jp). This file is part of GDB, GAS, and the GNU binutils. @@ -132,7 +133,8 @@ print_insn_arg (d, l, pc, info) case 'a': (*info->print_address_func) - (((pc & 0xF0000000) | (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2)), + (((pc & ~ (bfd_vma) 0x0fffffff) + | (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2)), info); break; diff -upr --new-file binutils-2.9.5.0.41/opcodes/ppc-dis.c binutils-2.9.5.0.42/opcodes/ppc-dis.c --- binutils-2.9.5.0.41/opcodes/ppc-dis.c Sun Apr 16 10:07:30 2000 +++ binutils-2.9.5.0.42/opcodes/ppc-dis.c Fri May 12 08:03:11 2000 @@ -33,7 +33,8 @@ static int print_insn_powerpc PARAMS ((b int bigendian, int dialect)); /* Print a big endian PowerPC instruction. For convenience, also - disassemble instructions supported by the Motorola PowerPC 601. */ + disassemble instructions supported by the Motorola PowerPC 601 + and the Altivec vector unit. */ int print_insn_big_powerpc (memaddr, info) @@ -41,11 +42,13 @@ print_insn_big_powerpc (memaddr, info) struct disassemble_info *info; { return print_insn_powerpc (memaddr, info, 1, - PPC_OPCODE_PPC | PPC_OPCODE_601); + PPC_OPCODE_PPC | PPC_OPCODE_601 | + PPC_OPCODE_ALTIVEC); } /* Print a little endian PowerPC instruction. For convenience, also - disassemble instructions supported by the Motorola PowerPC 601. */ + disassemble instructions supported by the Motorola PowerPC 601 + and the Altivec vector unit. */ int print_insn_little_powerpc (memaddr, info) @@ -53,7 +56,8 @@ print_insn_little_powerpc (memaddr, info struct disassemble_info *info; { return print_insn_powerpc (memaddr, info, 0, - PPC_OPCODE_PPC | PPC_OPCODE_601); + PPC_OPCODE_PPC | PPC_OPCODE_601 | + PPC_OPCODE_ALTIVEC); } /* Print a POWER (RS/6000) instruction. */ @@ -181,6 +185,8 @@ print_insn_powerpc (memaddr, info, bigen (*info->fprintf_func) (info->stream, "r%ld", value); else if ((operand->flags & PPC_OPERAND_FPR) != 0) (*info->fprintf_func) (info->stream, "f%ld", value); + else if ((operand->flags & PPC_OPERAND_VR) != 0) + (*info->fprintf_func) (info->stream, "v%ld", value); else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0) (*info->print_address_func) (memaddr + value, info); else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) diff -upr --new-file binutils-2.9.5.0.41/opcodes/ppc-opc.c binutils-2.9.5.0.42/opcodes/ppc-opc.c --- binutils-2.9.5.0.41/opcodes/ppc-opc.c Sun Apr 16 10:07:30 2000 +++ binutils-2.9.5.0.42/opcodes/ppc-opc.c Fri May 12 08:03:11 2000 @@ -396,6 +396,39 @@ const struct powerpc_operand powerpc_ope /* The UI field in a D form instruction. */ #define UI U + 1 { 16, 0, 0, 0, 0 }, + + /* The VA field in a VA, VX or VXR form instruction. */ +#define VA UI + 1 +#define VA_MASK (0x1f << 16) + {5, 16, 0, 0, PPC_OPERAND_VR}, + + /* The VB field in a VA, VX or VXR form instruction. */ +#define VB VA + 1 +#define VB_MASK (0x1f << 11) + {5, 11, 0, 0, PPC_OPERAND_VR}, + + /* The VC field in a VA form instruction. */ +#define VC VB + 1 +#define VC_MASK (0x1f << 6) + {5, 6, 0, 0, PPC_OPERAND_VR}, + + /* The VD or VS field in a VA, VX, VXR or X form instruction. */ +#define VD VC + 1 +#define VS VD +#define VD_MASK (0x1f << 21) + {5, 21, 0, 0, PPC_OPERAND_VR}, + + /* The SIMM field in a VX form instruction. */ +#define SIMM VD + 1 + { 5, 16, 0, 0, PPC_OPERAND_SIGNED}, + + /* The UIMM field in a VX form instruction. */ +#define UIMM SIMM + 1 + { 5, 16, 0, 0, 0 }, + + /* The SHB field in a VA form instruction. */ +#define SHB UIMM + 1 + { 4, 6, 0, 0, 0 }, }; /* The functions used to insert and extract complicated operands. */ @@ -1105,6 +1138,24 @@ extract_tbr (insn, invalid) #define SC(op, sa, lk) (OP (op) | ((((unsigned long)(sa)) & 1) << 1) | ((lk) & 1)) #define SC_MASK (OP_MASK | (((unsigned long)0x3ff) << 16) | (((unsigned long)1) << 1) | 1) +/* An VX form instruction. */ +#define VX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x7ff)) + +/* The mask for an VX form instruction. */ +#define VX_MASK VX(0x3f, 0x7ff) + +/* An VA form instruction. */ +#define VXA(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x07f)) + +/* The mask for an VA form instruction. */ +#define VXA_MASK VXA(0x3f, 0x7f) + +/* An VXR form instruction. */ +#define VXR(op, xop, rc) (OP (op) | (((rc) & 1) << 10) | (((unsigned long)(xop)) & 0x3ff)) + +/* The mask for a VXR form instruction. */ +#define VXR_MASK VXR(0x3f, 0x3ff, 1) + /* An X form instruction. */ #define X(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1)) @@ -1272,6 +1323,7 @@ extract_tbr (insn, invalid) #define PPC403 PPC #define PPC750 PPC #define PPC860 PPC +#define PPCVEC PPC_OPCODE_ALTIVEC | PPC_OPCODE_ANY #define POWER PPC_OPCODE_POWER | PPC_OPCODE_ANY #define POWER2 PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_ANY #define PPCPWR2 PPC_OPCODE_PPC | PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_ANY @@ -1348,6 +1400,164 @@ const struct powerpc_opcode powerpc_opco { "tnei", OPTO(3,TONE), OPTO_MASK, PWRCOM, { RA, SI } }, { "twi", OP(3), OP_MASK, PPCCOM, { TO, RA, SI } }, { "ti", OP(3), OP_MASK, PWRCOM, { TO, RA, SI } }, + +{ "mfvscr", VX(4, 1540), VX_MASK, PPCVEC, { VD } }, +{ "mtvscr", VX(4, 1604), VX_MASK, PPCVEC, { VD } }, +{ "vaddcuw", VX(4, 384), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vaddfp", VX(4, 10), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vaddsbs", VX(4, 768), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vaddshs", VX(4, 832), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vaddsws", VX(4, 896), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vaddubm", VX(4, 0), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vaddubs", VX(4, 512), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vadduhm", VX(4, 64), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vadduhs", VX(4, 576), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vadduwm", VX(4, 128), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vadduws", VX(4, 640), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vand", VX(4, 1028), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vandc", VX(4, 1092), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vavgsb", VX(4, 1282), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vavgsh", VX(4, 1346), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vavgsw", VX(4, 1410), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vavgub", VX(4, 1026), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vavguh", VX(4, 1090), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vavguw", VX(4, 1154), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcfsx", VX(4, 842), VX_MASK, PPCVEC, { VD, VB, UIMM } }, +{ "vcfux", VX(4, 778), VX_MASK, PPCVEC, { VD, VB, UIMM } }, +{ "vcmpbfp", VXR(4, 966, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpbfp.", VXR(4, 966, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpeqfp", VXR(4, 198, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpeqfp.", VXR(4, 198, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpequb", VXR(4, 6, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpequb.", VXR(4, 6, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpequh", VXR(4, 70, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpequh.", VXR(4, 70, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpequw", VXR(4, 134, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpequw.", VXR(4, 134, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgefp", VXR(4, 454, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgefp.", VXR(4, 454, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgtfp", VXR(4, 710, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgtfp.", VXR(4, 710, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgtsb", VXR(4, 774, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgtsb.", VXR(4, 774, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgtsh", VXR(4, 838, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgtsh.", VXR(4, 838, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgtsw", VXR(4, 902, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgtsw.", VXR(4, 902, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgtub", VXR(4, 518, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgtub.", VXR(4, 518, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgtuh", VXR(4, 582, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgtuh.", VXR(4, 582, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgtuw", VXR(4, 646, 0), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vcmpgtuw.", VXR(4, 646, 1), VXR_MASK, PPCVEC, { VD, VA, VB } }, +{ "vctsxs", VX(4, 970), VX_MASK, PPCVEC, { VD, VB, UIMM } }, +{ "vctuxs", VX(4, 906), VX_MASK, PPCVEC, { VD, VB, UIMM } }, +{ "vexptefp", VX(4, 394), VX_MASK, PPCVEC, { VD, VB } }, +{ "vlogefp", VX(4, 458), VX_MASK, PPCVEC, { VD, VB } }, +{ "vmaddfp", VXA(4, 46), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, +{ "vmaxfp", VX(4, 1034), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmaxsb", VX(4, 258), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmaxsh", VX(4, 322), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmaxsw", VX(4, 386), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmaxub", VX(4, 2), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmaxuh", VX(4, 66), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmaxuw", VX(4, 130), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmhaddshs", VXA(4, 32), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, +{ "vmhraddshs", VXA(4, 33), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, +{ "vminfp", VX(4, 1098), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vminsb", VX(4, 770), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vminsh", VX(4, 834), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vminsw", VX(4, 898), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vminub", VX(4, 514), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vminuh", VX(4, 578), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vminuw", VX(4, 642), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmladduhm", VXA(4, 34), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, +{ "vmrghb", VX(4, 12), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmrghh", VX(4, 76), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmrghw", VX(4, 140), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmrglb", VX(4, 268), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmrglh", VX(4, 332), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmrglw", VX(4, 396), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmsummbm", VXA(4, 37), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, +{ "vmsumshm", VXA(4, 40), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, +{ "vmsumshs", VXA(4, 41), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, +{ "vmsumubm", VXA(4, 36), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, +{ "vmsumuhm", VXA(4, 38), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, +{ "vmsumuhs", VXA(4, 39), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, +{ "vmulesb", VX(4, 776), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmulesh", VX(4, 840), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmuleub", VX(4, 520), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmuleuh", VX(4, 584), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmulosb", VX(4, 264), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmulosh", VX(4, 328), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmuloub", VX(4, 8), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vmulouh", VX(4, 72), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vnmsubfp", VXA(4, 47), VXA_MASK, PPCVEC, { VD, VA, VC, VB } }, +{ "vnor", VX(4, 1284), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vor", VX(4, 1156), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vperm", VXA(4, 43), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, +{ "vpkpx", VX(4, 782), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vpkshss", VX(4, 398), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vpkshus", VX(4, 270), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vpkswss", VX(4, 462), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vpkswus", VX(4, 334), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vpkuhum", VX(4, 14), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vpkuhus", VX(4, 142), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vpkuwum", VX(4, 78), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vpkuwus", VX(4, 206), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vrefp", VX(4, 266), VX_MASK, PPCVEC, { VD, VB } }, +{ "vrfim", VX(4, 714), VX_MASK, PPCVEC, { VD, VB } }, +{ "vrfin", VX(4, 522), VX_MASK, PPCVEC, { VD, VB } }, +{ "vrfip", VX(4, 650), VX_MASK, PPCVEC, { VD, VB } }, +{ "vrfiz", VX(4, 586), VX_MASK, PPCVEC, { VD, VB } }, +{ "vrlb", VX(4, 4), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vrlh", VX(4, 68), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vrlw", VX(4, 132), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vrsqrtefp", VX(4, 330), VX_MASK, PPCVEC, { VD, VB } }, +{ "vsel", VXA(4, 42), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, +{ "vsl", VX(4, 452), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vslb", VX(4, 260), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsldoi", VXA(4, 44), VXA_MASK, PPCVEC, { VD, VA, VB, SHB } }, +{ "vslh", VX(4, 324), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vslo", VX(4, 1036), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vslw", VX(4, 338), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vspltb", VX(4, 524), VX_MASK, PPCVEC, { VD, VB, UIMM } }, +{ "vsplth", VX(4, 588), VX_MASK, PPCVEC, { VD, VB, UIMM } }, +{ "vspltisb", VX(4, 780), VX_MASK, PPCVEC, { VD, SIMM } }, +{ "vspltish", VX(4, 844), VX_MASK, PPCVEC, { VD, SIMM } }, +{ "vspltisw", VX(4, 908), VX_MASK, PPCVEC, { VD, SIMM } }, +{ "vspltw", VX(4, 652), VX_MASK, PPCVEC, { VD, VB, UIMM } }, +{ "vsr", VX(4, 708), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsrab", VX(4, 772), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsrah", VX(4, 836), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsraw", VX(4, 900), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsrb", VX(4, 516), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsrh", VX(4, 580), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsro", VX(4, 1100), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsrw", VX(4, 644), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsubcuw", VX(4, 1408), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsubfp", VX(4, 74), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsubsbs", VX(4, 1792), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsubshs", VX(4, 1856), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsubsws", VX(4, 1920), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsububm", VX(4, 1024), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsububs", VX(4, 1536), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsubuhm", VX(4, 1088), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsubuhs", VX(4, 1600), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsubuwm", VX(4, 1152), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsubuws", VX(4, 1664), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsumsws", VX(4, 1928), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsum2sws", VX(4, 1672), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsum4sbs", VX(4, 1800), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsum4shs", VX(4, 1608), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vsum4ubs", VX(4, 1544), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vupkhpx", VX(4, 846), VX_MASK, PPCVEC, { VD, VB } }, +{ "vupkhsb", VX(4, 526), VX_MASK, PPCVEC, { VD, VB } }, +{ "vupkhsh", VX(4, 590), VX_MASK, PPCVEC, { VD, VB } }, +{ "vupklpx", VX(4, 974), VX_MASK, PPCVEC, { VD, VB } }, +{ "vupklsb", VX(4, 654), VX_MASK, PPCVEC, { VD, VB } }, +{ "vupklsh", VX(4, 718), VX_MASK, PPCVEC, { VD, VB } }, +{ "vxor", VX(4, 1220), VX_MASK, PPCVEC, { VD, VA, VB } }, { "mulli", OP(7), OP_MASK, PPCCOM, { RT, RA, SI } }, { "muli", OP(7), OP_MASK, PWRCOM, { RT, RA, SI } }, @@ -1388,269 +1598,269 @@ const struct powerpc_opcode powerpc_opco { "cau", OP(15), OP_MASK, PWRCOM, { RT,RA,SISIGNOPT } }, { "subis", OP(15), OP_MASK, PPCCOM, { RT, RA, NSI } }, -{ "bdnz-", BBO(16,BODNZ,0,0), BBOYBI_MASK, PPC, { BDM } }, -{ "bdnz+", BBO(16,BODNZ,0,0), BBOYBI_MASK, PPC, { BDP } }, +{ "bdnz-", BBO(16,BODNZ,0,0), BBOYBI_MASK, PPCCOM, { BDM } }, +{ "bdnz+", BBO(16,BODNZ,0,0), BBOYBI_MASK, PPCCOM, { BDP } }, { "bdnz", BBO(16,BODNZ,0,0), BBOYBI_MASK, PPCCOM, { BD } }, { "bdn", BBO(16,BODNZ,0,0), BBOYBI_MASK, PWRCOM, { BD } }, -{ "bdnzl-", BBO(16,BODNZ,0,1), BBOYBI_MASK, PPC, { BDM } }, -{ "bdnzl+", BBO(16,BODNZ,0,1), BBOYBI_MASK, PPC, { BDP } }, +{ "bdnzl-", BBO(16,BODNZ,0,1), BBOYBI_MASK, PPCCOM, { BDM } }, +{ "bdnzl+", BBO(16,BODNZ,0,1), BBOYBI_MASK, PPCCOM, { BDP } }, { "bdnzl", BBO(16,BODNZ,0,1), BBOYBI_MASK, PPCCOM, { BD } }, { "bdnl", BBO(16,BODNZ,0,1), BBOYBI_MASK, PWRCOM, { BD } }, -{ "bdnza-", BBO(16,BODNZ,1,0), BBOYBI_MASK, PPC, { BDMA } }, -{ "bdnza+", BBO(16,BODNZ,1,0), BBOYBI_MASK, PPC, { BDPA } }, +{ "bdnza-", BBO(16,BODNZ,1,0), BBOYBI_MASK, PPCCOM, { BDMA } }, +{ "bdnza+", BBO(16,BODNZ,1,0), BBOYBI_MASK, PPCCOM, { BDPA } }, { "bdnza", BBO(16,BODNZ,1,0), BBOYBI_MASK, PPCCOM, { BDA } }, { "bdna", BBO(16,BODNZ,1,0), BBOYBI_MASK, PWRCOM, { BDA } }, -{ "bdnzla-", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPC, { BDMA } }, -{ "bdnzla+", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPC, { BDPA } }, +{ "bdnzla-", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPCCOM, { BDMA } }, +{ "bdnzla+", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPCCOM, { BDPA } }, { "bdnzla", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPCCOM, { BDA } }, { "bdnla", BBO(16,BODNZ,1,1), BBOYBI_MASK, PWRCOM, { BDA } }, -{ "bdz-", BBO(16,BODZ,0,0), BBOYBI_MASK, PPC, { BDM } }, -{ "bdz+", BBO(16,BODZ,0,0), BBOYBI_MASK, PPC, { BDP } }, +{ "bdz-", BBO(16,BODZ,0,0), BBOYBI_MASK, PPCCOM, { BDM } }, +{ "bdz+", BBO(16,BODZ,0,0), BBOYBI_MASK, PPCCOM, { BDP } }, { "bdz", BBO(16,BODZ,0,0), BBOYBI_MASK, COM, { BD } }, -{ "bdzl-", BBO(16,BODZ,0,1), BBOYBI_MASK, PPC, { BDM } }, -{ "bdzl+", BBO(16,BODZ,0,1), BBOYBI_MASK, PPC, { BDP } }, +{ "bdzl-", BBO(16,BODZ,0,1), BBOYBI_MASK, PPCCOM, { BDM } }, +{ "bdzl+", BBO(16,BODZ,0,1), BBOYBI_MASK, PPCCOM, { BDP } }, { "bdzl", BBO(16,BODZ,0,1), BBOYBI_MASK, COM, { BD } }, -{ "bdza-", BBO(16,BODZ,1,0), BBOYBI_MASK, PPC, { BDMA } }, -{ "bdza+", BBO(16,BODZ,1,0), BBOYBI_MASK, PPC, { BDPA } }, +{ "bdza-", BBO(16,BODZ,1,0), BBOYBI_MASK, PPCCOM, { BDMA } }, +{ "bdza+", BBO(16,BODZ,1,0), BBOYBI_MASK, PPCCOM, { BDPA } }, { "bdza", BBO(16,BODZ,1,0), BBOYBI_MASK, COM, { BDA } }, -{ "bdzla-", BBO(16,BODZ,1,1), BBOYBI_MASK, PPC, { BDMA } }, -{ "bdzla+", BBO(16,BODZ,1,1), BBOYBI_MASK, PPC, { BDPA } }, +{ "bdzla-", BBO(16,BODZ,1,1), BBOYBI_MASK, PPCCOM, { BDMA } }, +{ "bdzla+", BBO(16,BODZ,1,1), BBOYBI_MASK, PPCCOM, { BDPA } }, { "bdzla", BBO(16,BODZ,1,1), BBOYBI_MASK, COM, { BDA } }, -{ "blt-", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "blt+", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "blt", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, COM, { CR, BD } }, -{ "bltl-", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bltl+", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bltl", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, COM, { CR, BD } }, -{ "blta-", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "blta+", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "blta", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bltla-", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bltla+", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bltla", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bgt-", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bgt+", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bgt", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, COM, { CR, BD } }, -{ "bgtl-", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bgtl+", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bgtl", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, COM, { CR, BD } }, -{ "bgta-", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bgta+", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bgta", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bgtla-", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bgtla+", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bgtla", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, COM, { CR, BDA } }, -{ "beq-", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "beq+", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "beq", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, COM, { CR, BD } }, -{ "beql-", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "beql+", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "beql", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, COM, { CR, BD } }, -{ "beqa-", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "beqa+", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "beqa", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, COM, { CR, BDA } }, -{ "beqla-", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "beqla+", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "beqla", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bso-", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bso+", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bso", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, COM, { CR, BD } }, -{ "bsol-", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bsol+", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bsol", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, COM, { CR, BD } }, -{ "bsoa-", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bsoa+", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bsoa", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bsola-", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bsola+", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bsola", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bun-", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bun+", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bun", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BD } }, -{ "bunl-", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bunl+", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bunl", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BD } }, -{ "buna-", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "buna+", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "buna", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDA } }, -{ "bunla-", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bunla+", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bunla", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDA } }, -{ "bge-", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bge+", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bge", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, COM, { CR, BD } }, -{ "bgel-", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bgel+", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bgel", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, COM, { CR, BD } }, -{ "bgea-", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bgea+", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bgea", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bgela-", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bgela+", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bgela", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bnl-", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bnl+", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bnl", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, COM, { CR, BD } }, -{ "bnll-", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bnll+", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bnll", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, COM, { CR, BD } }, -{ "bnla-", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnla+", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnla", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bnlla-", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnlla+", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnlla", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, COM, { CR, BDA } }, -{ "ble-", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "ble+", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "ble", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, COM, { CR, BD } }, -{ "blel-", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "blel+", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "blel", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, COM, { CR, BD } }, -{ "blea-", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "blea+", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "blea", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, COM, { CR, BDA } }, -{ "blela-", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "blela+", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "blela", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bng-", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bng+", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bng", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, COM, { CR, BD } }, -{ "bngl-", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bngl+", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bngl", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, COM, { CR, BD } }, -{ "bnga-", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnga+", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnga", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bngla-", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bngla+", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bngla", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bne-", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bne+", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bne", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, COM, { CR, BD } }, -{ "bnel-", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bnel+", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bnel", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, COM, { CR, BD } }, -{ "bnea-", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnea+", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnea", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bnela-", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnela+", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnela", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bns-", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bns+", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bns", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, COM, { CR, BD } }, -{ "bnsl-", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bnsl+", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bnsl", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, COM, { CR, BD } }, -{ "bnsa-", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnsa+", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnsa", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bnsla-", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnsla+", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnsla", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, COM, { CR, BDA } }, -{ "bnu-", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bnu+", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bnu", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BD } }, -{ "bnul-", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bnul+", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bnul", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BD } }, -{ "bnua-", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnua+", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnua", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDA } }, -{ "bnula-", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnula+", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnula", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDA } }, -{ "bdnzt-", BBO(16,BODNZT,0,0), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdnzt+", BBO(16,BODNZT,0,0), BBOY_MASK, PPC, { BI, BDP } }, +{ "blt-", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "blt+", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "blt", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, COM, { CR, BD } }, +{ "bltl-", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bltl+", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bltl", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, COM, { CR, BD } }, +{ "blta-", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "blta+", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "blta", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bltla-", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bltla+", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bltla", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bgt-", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bgt+", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bgt", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, COM, { CR, BD } }, +{ "bgtl-", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bgtl+", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bgtl", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, COM, { CR, BD } }, +{ "bgta-", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bgta+", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bgta", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bgtla-", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bgtla+", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bgtla", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, COM, { CR, BDA } }, +{ "beq-", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "beq+", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "beq", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, COM, { CR, BD } }, +{ "beql-", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "beql+", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "beql", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, COM, { CR, BD } }, +{ "beqa-", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "beqa+", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "beqa", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, COM, { CR, BDA } }, +{ "beqla-", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "beqla+", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "beqla", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bso-", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bso+", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bso", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, COM, { CR, BD } }, +{ "bsol-", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bsol+", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bsol", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, COM, { CR, BD } }, +{ "bsoa-", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bsoa+", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bsoa", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bsola-", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bsola+", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bsola", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bun-", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bun+", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bun", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BD } }, +{ "bunl-", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bunl+", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bunl", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BD } }, +{ "buna-", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "buna+", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "buna", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDA } }, +{ "bunla-", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bunla+", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bunla", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDA } }, +{ "bge-", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bge+", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bge", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, COM, { CR, BD } }, +{ "bgel-", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bgel+", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bgel", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, COM, { CR, BD } }, +{ "bgea-", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bgea+", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bgea", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bgela-", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bgela+", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bgela", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bnl-", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bnl+", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bnl", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, COM, { CR, BD } }, +{ "bnll-", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bnll+", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bnll", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, COM, { CR, BD } }, +{ "bnla-", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bnla+", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bnla", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bnlla-", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bnlla+", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bnlla", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, COM, { CR, BDA } }, +{ "ble-", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "ble+", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "ble", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, COM, { CR, BD } }, +{ "blel-", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "blel+", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "blel", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, COM, { CR, BD } }, +{ "blea-", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "blea+", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "blea", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, COM, { CR, BDA } }, +{ "blela-", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "blela+", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "blela", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bng-", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bng+", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bng", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, COM, { CR, BD } }, +{ "bngl-", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bngl+", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bngl", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, COM, { CR, BD } }, +{ "bnga-", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bnga+", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bnga", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bngla-", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bngla+", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bngla", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bne-", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bne+", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bne", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, COM, { CR, BD } }, +{ "bnel-", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bnel+", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bnel", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, COM, { CR, BD } }, +{ "bnea-", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bnea+", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bnea", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bnela-", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bnela+", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bnela", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bns-", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bns+", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bns", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, COM, { CR, BD } }, +{ "bnsl-", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bnsl+", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bnsl", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, COM, { CR, BD } }, +{ "bnsa-", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bnsa+", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bnsa", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bnsla-", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bnsla+", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bnsla", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, COM, { CR, BDA } }, +{ "bnu-", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bnu+", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bnu", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BD } }, +{ "bnul-", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } }, +{ "bnul+", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } }, +{ "bnul", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BD } }, +{ "bnua-", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bnua+", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bnua", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDA } }, +{ "bnula-", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } }, +{ "bnula+", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } }, +{ "bnula", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDA } }, +{ "bdnzt-", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, { BI, BDM } }, +{ "bdnzt+", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, { BI, BDP } }, { "bdnzt", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, { BI, BD } }, -{ "bdnztl-", BBO(16,BODNZT,0,1), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdnztl+", BBO(16,BODNZT,0,1), BBOY_MASK, PPC, { BI, BDP } }, +{ "bdnztl-", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, { BI, BDM } }, +{ "bdnztl+", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, { BI, BDP } }, { "bdnztl", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, { BI, BD } }, -{ "bdnzta-", BBO(16,BODNZT,1,0), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdnzta+", BBO(16,BODNZT,1,0), BBOY_MASK, PPC, { BI, BDPA } }, +{ "bdnzta-", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, { BI, BDMA } }, +{ "bdnzta+", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, { BI, BDPA } }, { "bdnzta", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, { BI, BDA } }, -{ "bdnztla-",BBO(16,BODNZT,1,1), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdnztla+",BBO(16,BODNZT,1,1), BBOY_MASK, PPC, { BI, BDPA } }, +{ "bdnztla-",BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, { BI, BDMA } }, +{ "bdnztla+",BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, { BI, BDPA } }, { "bdnztla", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, { BI, BDA } }, -{ "bdnzf-", BBO(16,BODNZF,0,0), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdnzf+", BBO(16,BODNZF,0,0), BBOY_MASK, PPC, { BI, BDP } }, +{ "bdnzf-", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, { BI, BDM } }, +{ "bdnzf+", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, { BI, BDP } }, { "bdnzf", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, { BI, BD } }, -{ "bdnzfl-", BBO(16,BODNZF,0,1), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdnzfl+", BBO(16,BODNZF,0,1), BBOY_MASK, PPC, { BI, BDP } }, +{ "bdnzfl-", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, { BI, BDM } }, +{ "bdnzfl+", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, { BI, BDP } }, { "bdnzfl", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, { BI, BD } }, -{ "bdnzfa-", BBO(16,BODNZF,1,0), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdnzfa+", BBO(16,BODNZF,1,0), BBOY_MASK, PPC, { BI, BDPA } }, +{ "bdnzfa-", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, { BI, BDMA } }, +{ "bdnzfa+", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, { BI, BDPA } }, { "bdnzfa", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, { BI, BDA } }, -{ "bdnzfla-",BBO(16,BODNZF,1,1), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdnzfla+",BBO(16,BODNZF,1,1), BBOY_MASK, PPC, { BI, BDPA } }, +{ "bdnzfla-",BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, { BI, BDMA } }, +{ "bdnzfla+",BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, { BI, BDPA } }, { "bdnzfla", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, { BI, BDA } }, -{ "bt-", BBO(16,BOT,0,0), BBOY_MASK, PPC, { BI, BDM } }, -{ "bt+", BBO(16,BOT,0,0), BBOY_MASK, PPC, { BI, BDP } }, +{ "bt-", BBO(16,BOT,0,0), BBOY_MASK, PPCCOM, { BI, BDM } }, +{ "bt+", BBO(16,BOT,0,0), BBOY_MASK, PPCCOM, { BI, BDP } }, { "bt", BBO(16,BOT,0,0), BBOY_MASK, PPCCOM, { BI, BD } }, { "bbt", BBO(16,BOT,0,0), BBOY_MASK, PWRCOM, { BI, BD } }, -{ "btl-", BBO(16,BOT,0,1), BBOY_MASK, PPC, { BI, BDM } }, -{ "btl+", BBO(16,BOT,0,1), BBOY_MASK, PPC, { BI, BDP } }, +{ "btl-", BBO(16,BOT,0,1), BBOY_MASK, PPCCOM, { BI, BDM } }, +{ "btl+", BBO(16,BOT,0,1), BBOY_MASK, PPCCOM, { BI, BDP } }, { "btl", BBO(16,BOT,0,1), BBOY_MASK, PPCCOM, { BI, BD } }, { "bbtl", BBO(16,BOT,0,1), BBOY_MASK, PWRCOM, { BI, BD } }, -{ "bta-", BBO(16,BOT,1,0), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bta+", BBO(16,BOT,1,0), BBOY_MASK, PPC, { BI, BDPA } }, +{ "bta-", BBO(16,BOT,1,0), BBOY_MASK, PPCCOM, { BI, BDMA } }, +{ "bta+", BBO(16,BOT,1,0), BBOY_MASK, PPCCOM, { BI, BDPA } }, { "bta", BBO(16,BOT,1,0), BBOY_MASK, PPCCOM, { BI, BDA } }, { "bbta", BBO(16,BOT,1,0), BBOY_MASK, PWRCOM, { BI, BDA } }, -{ "btla-", BBO(16,BOT,1,1), BBOY_MASK, PPC, { BI, BDMA } }, -{ "btla+", BBO(16,BOT,1,1), BBOY_MASK, PPC, { BI, BDPA } }, +{ "btla-", BBO(16,BOT,1,1), BBOY_MASK, PPCCOM, { BI, BDMA } }, +{ "btla+", BBO(16,BOT,1,1), BBOY_MASK, PPCCOM, { BI, BDPA } }, { "btla", BBO(16,BOT,1,1), BBOY_MASK, PPCCOM, { BI, BDA } }, { "bbtla", BBO(16,BOT,1,1), BBOY_MASK, PWRCOM, { BI, BDA } }, -{ "bf-", BBO(16,BOF,0,0), BBOY_MASK, PPC, { BI, BDM } }, -{ "bf+", BBO(16,BOF,0,0), BBOY_MASK, PPC, { BI, BDP } }, +{ "bf-", BBO(16,BOF,0,0), BBOY_MASK, PPCCOM, { BI, BDM } }, +{ "bf+", BBO(16,BOF,0,0), BBOY_MASK, PPCCOM, { BI, BDP } }, { "bf", BBO(16,BOF,0,0), BBOY_MASK, PPCCOM, { BI, BD } }, { "bbf", BBO(16,BOF,0,0), BBOY_MASK, PWRCOM, { BI, BD } }, -{ "bfl-", BBO(16,BOF,0,1), BBOY_MASK, PPC, { BI, BDM } }, -{ "bfl+", BBO(16,BOF,0,1), BBOY_MASK, PPC, { BI, BDP } }, +{ "bfl-", BBO(16,BOF,0,1), BBOY_MASK, PPCCOM, { BI, BDM } }, +{ "bfl+", BBO(16,BOF,0,1), BBOY_MASK, PPCCOM, { BI, BDP } }, { "bfl", BBO(16,BOF,0,1), BBOY_MASK, PPCCOM, { BI, BD } }, { "bbfl", BBO(16,BOF,0,1), BBOY_MASK, PWRCOM, { BI, BD } }, -{ "bfa-", BBO(16,BOF,1,0), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bfa+", BBO(16,BOF,1,0), BBOY_MASK, PPC, { BI, BDPA } }, +{ "bfa-", BBO(16,BOF,1,0), BBOY_MASK, PPCCOM, { BI, BDMA } }, +{ "bfa+", BBO(16,BOF,1,0), BBOY_MASK, PPCCOM, { BI, BDPA } }, { "bfa", BBO(16,BOF,1,0), BBOY_MASK, PPCCOM, { BI, BDA } }, { "bbfa", BBO(16,BOF,1,0), BBOY_MASK, PWRCOM, { BI, BDA } }, -{ "bfla-", BBO(16,BOF,1,1), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bfla+", BBO(16,BOF,1,1), BBOY_MASK, PPC, { BI, BDPA } }, +{ "bfla-", BBO(16,BOF,1,1), BBOY_MASK, PPCCOM, { BI, BDMA } }, +{ "bfla+", BBO(16,BOF,1,1), BBOY_MASK, PPCCOM, { BI, BDPA } }, { "bfla", BBO(16,BOF,1,1), BBOY_MASK, PPCCOM, { BI, BDA } }, { "bbfla", BBO(16,BOF,1,1), BBOY_MASK, PWRCOM, { BI, BDA } }, -{ "bdzt-", BBO(16,BODZT,0,0), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdzt+", BBO(16,BODZT,0,0), BBOY_MASK, PPC, { BI, BDP } }, +{ "bdzt-", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, { BI, BDM } }, +{ "bdzt+", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, { BI, BDP } }, { "bdzt", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, { BI, BD } }, -{ "bdztl-", BBO(16,BODZT,0,1), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdztl+", BBO(16,BODZT,0,1), BBOY_MASK, PPC, { BI, BDP } }, +{ "bdztl-", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, { BI, BDM } }, +{ "bdztl+", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, { BI, BDP } }, { "bdztl", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, { BI, BD } }, -{ "bdzta-", BBO(16,BODZT,1,0), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdzta+", BBO(16,BODZT,1,0), BBOY_MASK, PPC, { BI, BDPA } }, +{ "bdzta-", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, { BI, BDMA } }, +{ "bdzta+", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, { BI, BDPA } }, { "bdzta", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, { BI, BDA } }, -{ "bdztla-", BBO(16,BODZT,1,1), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdztla+", BBO(16,BODZT,1,1), BBOY_MASK, PPC, { BI, BDPA } }, +{ "bdztla-", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, { BI, BDMA } }, +{ "bdztla+", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, { BI, BDPA } }, { "bdztla", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, { BI, BDA } }, -{ "bdzf-", BBO(16,BODZF,0,0), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdzf+", BBO(16,BODZF,0,0), BBOY_MASK, PPC, { BI, BDP } }, +{ "bdzf-", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, { BI, BDM } }, +{ "bdzf+", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, { BI, BDP } }, { "bdzf", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, { BI, BD } }, -{ "bdzfl-", BBO(16,BODZF,0,1), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdzfl+", BBO(16,BODZF,0,1), BBOY_MASK, PPC, { BI, BDP } }, +{ "bdzfl-", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, { BI, BDM } }, +{ "bdzfl+", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, { BI, BDP } }, { "bdzfl", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, { BI, BD } }, -{ "bdzfa-", BBO(16,BODZF,1,0), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdzfa+", BBO(16,BODZF,1,0), BBOY_MASK, PPC, { BI, BDPA } }, +{ "bdzfa-", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, { BI, BDMA } }, +{ "bdzfa+", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, { BI, BDPA } }, { "bdzfa", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, { BI, BDA } }, -{ "bdzfla-", BBO(16,BODZF,1,1), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdzfla+", BBO(16,BODZF,1,1), BBOY_MASK, PPC, { BI, BDPA } }, +{ "bdzfla-", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, { BI, BDMA } }, +{ "bdzfla+", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, { BI, BDPA } }, { "bdzfla", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, { BI, BDA } }, -{ "bc-", B(16,0,0), B_MASK, PPC, { BOE, BI, BDM } }, -{ "bc+", B(16,0,0), B_MASK, PPC, { BOE, BI, BDP } }, +{ "bc-", B(16,0,0), B_MASK, PPCCOM, { BOE, BI, BDM } }, +{ "bc+", B(16,0,0), B_MASK, PPCCOM, { BOE, BI, BDP } }, { "bc", B(16,0,0), B_MASK, COM, { BO, BI, BD } }, -{ "bcl-", B(16,0,1), B_MASK, PPC, { BOE, BI, BDM } }, -{ "bcl+", B(16,0,1), B_MASK, PPC, { BOE, BI, BDP } }, +{ "bcl-", B(16,0,1), B_MASK, PPCCOM, { BOE, BI, BDM } }, +{ "bcl+", B(16,0,1), B_MASK, PPCCOM, { BOE, BI, BDP } }, { "bcl", B(16,0,1), B_MASK, COM, { BO, BI, BD } }, -{ "bca-", B(16,1,0), B_MASK, PPC, { BOE, BI, BDMA } }, -{ "bca+", B(16,1,0), B_MASK, PPC, { BOE, BI, BDPA } }, +{ "bca-", B(16,1,0), B_MASK, PPCCOM, { BOE, BI, BDMA } }, +{ "bca+", B(16,1,0), B_MASK, PPCCOM, { BOE, BI, BDPA } }, { "bca", B(16,1,0), B_MASK, COM, { BO, BI, BDA } }, -{ "bcla-", B(16,1,1), B_MASK, PPC, { BOE, BI, BDMA } }, -{ "bcla+", B(16,1,1), B_MASK, PPC, { BOE, BI, BDPA } }, +{ "bcla-", B(16,1,1), B_MASK, PPCCOM, { BOE, BI, BDMA } }, +{ "bcla+", B(16,1,1), B_MASK, PPCCOM, { BOE, BI, BDPA } }, { "bcla", B(16,1,1), B_MASK, COM, { BO, BI, BDA } }, { "sc", SC(17,1,0), 0xffffffff, PPC, { 0 } }, @@ -1671,155 +1881,155 @@ const struct powerpc_opcode powerpc_opco { "blrl", XLO(19,BOU,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } }, { "brl", XLO(19,BOU,16,1), XLBOBIBB_MASK, PWRCOM, { 0 } }, { "bdnzlr", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } }, -{ "bdnzlr-", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdnzlr+", XLO(19,BODNZP,16,0), XLBOBIBB_MASK, PPC, { 0 } }, +{ "bdnzlr-", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } }, +{ "bdnzlr+", XLO(19,BODNZP,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } }, { "bdnzlrl", XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } }, -{ "bdnzlrl-",XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdnzlrl+",XLO(19,BODNZP,16,1), XLBOBIBB_MASK, PPC, { 0 } }, +{ "bdnzlrl-",XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } }, +{ "bdnzlrl+",XLO(19,BODNZP,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } }, { "bdzlr", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } }, -{ "bdzlr-", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdzlr+", XLO(19,BODZP,16,0), XLBOBIBB_MASK, PPC, { 0 } }, +{ "bdzlr-", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } }, +{ "bdzlr+", XLO(19,BODZP,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } }, { "bdzlrl", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } }, -{ "bdzlrl-", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdzlrl+", XLO(19,BODZP,16,1), XLBOBIBB_MASK, PPC, { 0 } }, +{ "bdzlrl-", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } }, +{ "bdzlrl+", XLO(19,BODZP,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } }, { "bltlr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bltlr-", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltlr+", XLOCB(19,BOTP,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bltlr-", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bltlr+", XLOCB(19,BOTP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bltr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bltlrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bltlrl-", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltlrl+", XLOCB(19,BOTP,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bltlrl-", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bltlrl+", XLOCB(19,BOTP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bltrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bgtlr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bgtlr-", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtlr+", XLOCB(19,BOTP,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bgtlr-", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bgtlr+", XLOCB(19,BOTP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bgtr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bgtlrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bgtlrl-", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtlrl+", XLOCB(19,BOTP,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bgtlrl-", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bgtlrl+", XLOCB(19,BOTP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bgtrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, { "beqlr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "beqlr-", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqlr+", XLOCB(19,BOTP,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "beqlr-", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "beqlr+", XLOCB(19,BOTP,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "beqr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, { "beqlrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "beqlrl-", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqlrl+", XLOCB(19,BOTP,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "beqlrl-", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "beqlrl+", XLOCB(19,BOTP,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "beqrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bsolr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bsolr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsolr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bsolr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bsolr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bsor", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bsolrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bsolrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsolrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bsolrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bsolrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bsorl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bunlr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bunlr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunlr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bunlr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bunlr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bunlrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bunlrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunlrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bunlrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bunlrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bgelr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bgelr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgelr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bgelr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bgelr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bger", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bgelrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bgelrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgelrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bgelrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bgelrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bgerl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bnllr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnllr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnllr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnllr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnllr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bnlr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bnllrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnllrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnllrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnllrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnllrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bnlrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, { "blelr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "blelr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "blelr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "blelr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "blelr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bler", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, { "blelrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "blelrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "blelrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "blelrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "blelrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "blerl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bnglr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnglr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnglr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnglr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnglr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bngr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bnglrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnglrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnglrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnglrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnglrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bngrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bnelr", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnelr-", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnelr+", XLOCB(19,BOFP,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnelr-", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnelr+", XLOCB(19,BOFP,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bner", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bnelrl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnelrl-", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnelrl+", XLOCB(19,BOFP,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnelrl-", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnelrl+", XLOCB(19,BOFP,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bnerl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bnslr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnslr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnslr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnslr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnslr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bnsr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bnslrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnslrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnslrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnslrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnslrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bnsrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, { CR } }, { "bnulr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnulr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnulr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnulr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnulr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bnulrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnulrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnulrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnulrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnulrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "btlr", XLO(19,BOT,16,0), XLBOBB_MASK, PPCCOM, { BI } }, -{ "btlr-", XLO(19,BOT,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "btlr+", XLO(19,BOTP,16,0), XLBOBB_MASK, PPC, { BI } }, +{ "btlr-", XLO(19,BOT,16,0), XLBOBB_MASK, PPCCOM, { BI } }, +{ "btlr+", XLO(19,BOTP,16,0), XLBOBB_MASK, PPCCOM, { BI } }, { "bbtr", XLO(19,BOT,16,0), XLBOBB_MASK, PWRCOM, { BI } }, { "btlrl", XLO(19,BOT,16,1), XLBOBB_MASK, PPCCOM, { BI } }, -{ "btlrl-", XLO(19,BOT,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "btlrl+", XLO(19,BOTP,16,1), XLBOBB_MASK, PPC, { BI } }, +{ "btlrl-", XLO(19,BOT,16,1), XLBOBB_MASK, PPCCOM, { BI } }, +{ "btlrl+", XLO(19,BOTP,16,1), XLBOBB_MASK, PPCCOM, { BI } }, { "bbtrl", XLO(19,BOT,16,1), XLBOBB_MASK, PWRCOM, { BI } }, { "bflr", XLO(19,BOF,16,0), XLBOBB_MASK, PPCCOM, { BI } }, -{ "bflr-", XLO(19,BOF,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bflr+", XLO(19,BOFP,16,0), XLBOBB_MASK, PPC, { BI } }, +{ "bflr-", XLO(19,BOF,16,0), XLBOBB_MASK, PPCCOM, { BI } }, +{ "bflr+", XLO(19,BOFP,16,0), XLBOBB_MASK, PPCCOM, { BI } }, { "bbfr", XLO(19,BOF,16,0), XLBOBB_MASK, PWRCOM, { BI } }, { "bflrl", XLO(19,BOF,16,1), XLBOBB_MASK, PPCCOM, { BI } }, -{ "bflrl-", XLO(19,BOF,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bflrl+", XLO(19,BOFP,16,1), XLBOBB_MASK, PPC, { BI } }, +{ "bflrl-", XLO(19,BOF,16,1), XLBOBB_MASK, PPCCOM, { BI } }, +{ "bflrl+", XLO(19,BOFP,16,1), XLBOBB_MASK, PPCCOM, { BI } }, { "bbfrl", XLO(19,BOF,16,1), XLBOBB_MASK, PWRCOM, { BI } }, { "bdnztlr", XLO(19,BODNZT,16,0), XLBOBB_MASK, PPCCOM, { BI } }, -{ "bdnztlr-",XLO(19,BODNZT,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdnztlr+",XLO(19,BODNZTP,16,0), XLBOBB_MASK, PPC, { BI } }, +{ "bdnztlr-",XLO(19,BODNZT,16,0), XLBOBB_MASK, PPCCOM, { BI } }, +{ "bdnztlr+",XLO(19,BODNZTP,16,0), XLBOBB_MASK, PPCCOM, { BI } }, { "bdnztlrl",XLO(19,BODNZT,16,1), XLBOBB_MASK, PPCCOM, { BI } }, -{ "bdnztlrl-",XLO(19,BODNZT,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdnztlrl+",XLO(19,BODNZTP,16,1), XLBOBB_MASK, PPC, { BI } }, +{ "bdnztlrl-",XLO(19,BODNZT,16,1), XLBOBB_MASK, PPCCOM, { BI } }, +{ "bdnztlrl+",XLO(19,BODNZTP,16,1), XLBOBB_MASK, PPCCOM,{ BI } }, { "bdnzflr", XLO(19,BODNZF,16,0), XLBOBB_MASK, PPCCOM, { BI } }, -{ "bdnzflr-",XLO(19,BODNZF,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdnzflr+",XLO(19,BODNZFP,16,0), XLBOBB_MASK, PPC, { BI } }, +{ "bdnzflr-",XLO(19,BODNZF,16,0), XLBOBB_MASK, PPCCOM, { BI } }, +{ "bdnzflr+",XLO(19,BODNZFP,16,0), XLBOBB_MASK, PPCCOM, { BI } }, { "bdnzflrl",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPCCOM, { BI } }, -{ "bdnzflrl-",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdnzflrl+",XLO(19,BODNZFP,16,1), XLBOBB_MASK, PPC, { BI } }, +{ "bdnzflrl-",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPCCOM, { BI } }, +{ "bdnzflrl+",XLO(19,BODNZFP,16,1), XLBOBB_MASK, PPCCOM,{ BI } }, { "bdztlr", XLO(19,BODZT,16,0), XLBOBB_MASK, PPCCOM, { BI } }, -{ "bdztlr-", XLO(19,BODZT,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdztlr+", XLO(19,BODZTP,16,0), XLBOBB_MASK, PPC, { BI } }, +{ "bdztlr-", XLO(19,BODZT,16,0), XLBOBB_MASK, PPCCOM, { BI } }, +{ "bdztlr+", XLO(19,BODZTP,16,0), XLBOBB_MASK, PPCCOM, { BI } }, { "bdztlrl", XLO(19,BODZT,16,1), XLBOBB_MASK, PPCCOM, { BI } }, -{ "bdztlrl-",XLO(19,BODZT,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdztlrl+",XLO(19,BODZTP,16,1), XLBOBB_MASK, PPC, { BI } }, +{ "bdztlrl-",XLO(19,BODZT,16,1), XLBOBB_MASK, PPCCOM, { BI } }, +{ "bdztlrl+",XLO(19,BODZTP,16,1), XLBOBB_MASK, PPCCOM, { BI } }, { "bdzflr", XLO(19,BODZF,16,0), XLBOBB_MASK, PPCCOM, { BI } }, -{ "bdzflr-", XLO(19,BODZF,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdzflr+", XLO(19,BODZFP,16,0), XLBOBB_MASK, PPC, { BI } }, +{ "bdzflr-", XLO(19,BODZF,16,0), XLBOBB_MASK, PPCCOM, { BI } }, +{ "bdzflr+", XLO(19,BODZFP,16,0), XLBOBB_MASK, PPCCOM, { BI } }, { "bdzflrl", XLO(19,BODZF,16,1), XLBOBB_MASK, PPCCOM, { BI } }, -{ "bdzflrl-",XLO(19,BODZF,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdzflrl+",XLO(19,BODZFP,16,1), XLBOBB_MASK, PPC, { BI } }, +{ "bdzflrl-",XLO(19,BODZF,16,1), XLBOBB_MASK, PPCCOM, { BI } }, +{ "bdzflrl+",XLO(19,BODZFP,16,1), XLBOBB_MASK, PPCCOM, { BI } }, { "bclr", XLLK(19,16,0), XLYBB_MASK, PPCCOM, { BO, BI } }, { "bclrl", XLLK(19,16,1), XLYBB_MASK, PPCCOM, { BO, BI } }, -{ "bclr+", XLYLK(19,16,1,0), XLYBB_MASK, PPC, { BOE, BI } }, -{ "bclrl+", XLYLK(19,16,1,1), XLYBB_MASK, PPC, { BOE, BI } }, -{ "bclr-", XLYLK(19,16,0,0), XLYBB_MASK, PPC, { BOE, BI } }, -{ "bclrl-", XLYLK(19,16,0,1), XLYBB_MASK, PPC, { BOE, BI } }, +{ "bclr+", XLYLK(19,16,1,0), XLYBB_MASK, PPCCOM, { BOE, BI } }, +{ "bclrl+", XLYLK(19,16,1,1), XLYBB_MASK, PPCCOM, { BOE, BI } }, +{ "bclr-", XLYLK(19,16,0,0), XLYBB_MASK, PPCCOM, { BOE, BI } }, +{ "bclrl-", XLYLK(19,16,0,1), XLYBB_MASK, PPCCOM, { BOE, BI } }, { "bcr", XLLK(19,16,0), XLBB_MASK, PWRCOM, { BO, BI } }, { "bcrl", XLLK(19,16,1), XLBB_MASK, PWRCOM, { BO, BI } }, @@ -1854,95 +2064,95 @@ const struct powerpc_opcode powerpc_opco { "bctr", XLO(19,BOU,528,0), XLBOBIBB_MASK, COM, { 0 } }, { "bctrl", XLO(19,BOU,528,1), XLBOBIBB_MASK, COM, { 0 } }, { "bltctr", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bltctr-", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltctr+", XLOCB(19,BOTP,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bltctr-", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bltctr+", XLOCB(19,BOTP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bltctrl", XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bltctrl-",XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltctrl+",XLOCB(19,BOTP,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bltctrl-",XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bltctrl+",XLOCB(19,BOTP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bgtctr", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bgtctr-", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtctr+", XLOCB(19,BOTP,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bgtctr-", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bgtctr+", XLOCB(19,BOTP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bgtctrl", XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bgtctrl-",XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtctrl+",XLOCB(19,BOTP,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bgtctrl-",XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bgtctrl+",XLOCB(19,BOTP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "beqctr", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "beqctr-", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqctr+", XLOCB(19,BOTP,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "beqctr-", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "beqctr+", XLOCB(19,BOTP,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "beqctrl", XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "beqctrl-",XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqctrl+",XLOCB(19,BOTP,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "beqctrl-",XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "beqctrl+",XLOCB(19,BOTP,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bsoctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bsoctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsoctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bsoctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bsoctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bsoctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bsoctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsoctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bsoctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bsoctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bunctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bunctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bunctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bunctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bunctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bunctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bunctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bunctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bgectr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bgectr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgectr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bgectr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bgectr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bgectrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bgectrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgectrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bgectrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bgectrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bnlctr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnlctr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnlctr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnlctr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnlctr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bnlctrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnlctrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnlctrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnlctrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnlctrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "blectr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "blectr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "blectr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "blectr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "blectr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "blectrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "blectrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "blectrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "blectrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "blectrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bngctr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bngctr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bngctr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bngctr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bngctr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bngctrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bngctrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bngctrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bngctrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bngctrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bnectr", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnectr-", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnectr+", XLOCB(19,BOFP,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnectr-", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnectr+", XLOCB(19,BOFP,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bnectrl", XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnectrl-",XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnectrl+",XLOCB(19,BOFP,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnectrl-",XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnectrl+",XLOCB(19,BOFP,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bnsctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnsctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnsctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnsctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnsctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bnsctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnsctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnsctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnsctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnsctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bnuctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnuctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnuctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnuctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnuctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } }, { "bnuctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, -{ "bnuctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnuctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, +{ "bnuctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, +{ "bnuctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } }, { "btctr", XLO(19,BOT,528,0), XLBOBB_MASK, PPCCOM, { BI } }, -{ "btctr-", XLO(19,BOT,528,0), XLBOBB_MASK, PPC, { BI } }, -{ "btctr+", XLO(19,BOTP,528,0), XLBOBB_MASK, PPC, { BI } }, +{ "btctr-", XLO(19,BOT,528,0), XLBOBB_MASK, PPCCOM, { BI } }, +{ "btctr+", XLO(19,BOTP,528,0), XLBOBB_MASK, PPCCOM, { BI } }, { "btctrl", XLO(19,BOT,528,1), XLBOBB_MASK, PPCCOM, { BI } }, -{ "btctrl-", XLO(19,BOT,528,1), XLBOBB_MASK, PPC, { BI } }, -{ "btctrl+", XLO(19,BOTP,528,1), XLBOBB_MASK, PPC, { BI } }, +{ "btctrl-", XLO(19,BOT,528,1), XLBOBB_MASK, PPCCOM, { BI } }, +{ "btctrl+", XLO(19,BOTP,528,1), XLBOBB_MASK, PPCCOM, { BI } }, { "bfctr", XLO(19,BOF,528,0), XLBOBB_MASK, PPCCOM, { BI } }, -{ "bfctr-", XLO(19,BOF,528,0), XLBOBB_MASK, PPC, { BI } }, -{ "bfctr+", XLO(19,BOFP,528,0), XLBOBB_MASK, PPC, { BI } }, +{ "bfctr-", XLO(19,BOF,528,0), XLBOBB_MASK, PPCCOM, { BI } }, +{ "bfctr+", XLO(19,BOFP,528,0), XLBOBB_MASK, PPCCOM, { BI } }, { "bfctrl", XLO(19,BOF,528,1), XLBOBB_MASK, PPCCOM, { BI } }, -{ "bfctrl-", XLO(19,BOF,528,1), XLBOBB_MASK, PPC, { BI } }, -{ "bfctrl+", XLO(19,BOFP,528,1), XLBOBB_MASK, PPC, { BI } }, +{ "bfctrl-", XLO(19,BOF,528,1), XLBOBB_MASK, PPCCOM, { BI } }, +{ "bfctrl+", XLO(19,BOFP,528,1), XLBOBB_MASK, PPCCOM, { BI } }, { "bcctr", XLLK(19,528,0), XLYBB_MASK, PPCCOM, { BO, BI } }, -{ "bcctr-", XLYLK(19,528,0,0), XLYBB_MASK, PPC, { BOE, BI } }, -{ "bcctr+", XLYLK(19,528,1,0), XLYBB_MASK, PPC, { BOE, BI } }, +{ "bcctr-", XLYLK(19,528,0,0), XLYBB_MASK, PPCCOM, { BOE, BI } }, +{ "bcctr+", XLYLK(19,528,1,0), XLYBB_MASK, PPCCOM, { BOE, BI } }, { "bcctrl", XLLK(19,528,1), XLYBB_MASK, PPCCOM, { BO, BI } }, -{ "bcctrl-", XLYLK(19,528,0,1), XLYBB_MASK, PPC, { BOE, BI } }, -{ "bcctrl+", XLYLK(19,528,1,1), XLYBB_MASK, PPC, { BOE, BI } }, +{ "bcctrl-", XLYLK(19,528,0,1), XLYBB_MASK, PPCCOM, { BOE, BI } }, +{ "bcctrl+", XLYLK(19,528,1,1), XLYBB_MASK, PPCCOM, { BOE, BI } }, { "bcc", XLLK(19,528,0), XLBB_MASK, PWRCOM, { BO, BI } }, { "bccl", XLLK(19,528,1), XLBB_MASK, PWRCOM, { BO, BI } }, @@ -2853,6 +3063,19 @@ const struct powerpc_opcode powerpc_opco { "dcbz", X(31,1014), XRT_MASK, PPC, { RA, RB } }, { "dclz", X(31,1014), XRT_MASK, PPC, { RA, RB } }, + +{ "lvebx", X(31, 7), X_MASK, PPCVEC, { VD, RA, RB } }, +{ "lvehx", X(31, 39), X_MASK, PPCVEC, { VD, RA, RB } }, +{ "lvewx", X(31, 71), X_MASK, PPCVEC, { VD, RA, RB } }, +{ "lvsl", X(31, 6), X_MASK, PPCVEC, { VD, RA, RB } }, +{ "lvsr", X(31, 38), X_MASK, PPCVEC, { VD, RA, RB } }, +{ "lvx", X(31, 103), X_MASK, PPCVEC, { VD, RA, RB } }, +{ "lvxl", X(31, 359), X_MASK, PPCVEC, { VD, RA, RB } }, +{ "stvebx", X(31, 135), X_MASK, PPCVEC, { VS, RA, RB } }, +{ "stvehx", X(31, 167), X_MASK, PPCVEC, { VS, RA, RB } }, +{ "stvewx", X(31, 199), X_MASK, PPCVEC, { VS, RA, RB } }, +{ "stvx", X(31, 231), X_MASK, PPCVEC, { VS, RA, RB } }, +{ "stvxl", X(31, 487), X_MASK, PPCVEC, { VS, RA, RB } }, { "lwz", OP(32), OP_MASK, PPCCOM, { RT, D, RA } }, { "l", OP(32), OP_MASK, PWRCOM, { RT, D, RA } }, diff -upr --new-file binutils-2.9.5.0.41/opcodes/tic54x-dis.c binutils-2.9.5.0.42/opcodes/tic54x-dis.c --- binutils-2.9.5.0.41/opcodes/tic54x-dis.c Wed Dec 31 16:00:00 1969 +++ binutils-2.9.5.0.42/opcodes/tic54x-dis.c Fri May 12 08:03:13 2000 @@ -0,0 +1,615 @@ +/* Disassembly routines for TMS320C54X architecture + Copyright (C) 1999,2000 Free Software Foundation, Inc. + Contributed by Timothy Wall (twall@cygnus.com) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. */ + +#include +#include +#include +#include +#include "dis-asm.h" +#include "opcode/tic54x.h" +#include "coff/tic54x.h" + +typedef struct _instruction { + int parallel; + template *tm; + partemplate *ptm; +} instruction; + +static int get_insn_size PARAMS ((unsigned short, instruction *)); +static int get_instruction PARAMS ((disassemble_info *, bfd_vma, + unsigned short, instruction *)); +static int print_instruction PARAMS ((disassemble_info *, bfd_vma, + unsigned short, char *, + enum optype [], int, int)); +static int print_parallel_instruction PARAMS ((disassemble_info *, bfd_vma, + unsigned short, partemplate *, + int)); +static int sprint_dual_address (disassemble_info *,char [], + unsigned short); +static int sprint_indirect_address (disassemble_info *,char [], + unsigned short); +static int sprint_direct_address (disassemble_info *,char [], + unsigned short); +static int sprint_mmr (disassemble_info *,char [],int); +static int sprint_condition (disassemble_info *,char *,unsigned short); +static int sprint_cc2 (disassemble_info *,char *,unsigned short); + +int +print_insn_tic54x(memaddr, info) + bfd_vma memaddr; + disassemble_info *info; +{ + bfd_byte opbuf[2]; + unsigned short opcode; + int status, size; + instruction insn; + + status = (*info->read_memory_func) (memaddr, opbuf, 2, info); + if (status != 0) + { + (*info->memory_error_func)(status, memaddr, info); + return -1; + } + + opcode = bfd_getl16(opbuf); + if (!get_instruction (info, memaddr, opcode, &insn)) + return -1; + + size = get_insn_size (opcode, &insn); + info->bytes_per_line = 2; + info->bytes_per_chunk = 2; + info->octets_per_byte = 2; + info->display_endian = BFD_ENDIAN_LITTLE; + + if (insn.parallel) + { + if (!print_parallel_instruction (info, memaddr, opcode, insn.ptm, size)) + return -1; + } + else + { + if (!print_instruction (info, memaddr, opcode, + (char *)insn.tm->name, + insn.tm->operand_types, + size, (insn.tm->flags & FL_EXT))) + return -1; + } + + return size*2; +} + +static int +has_lkaddr(opcode, tm) + unsigned short opcode; + template *tm; +{ + return IS_LKADDR(opcode) && + (OPTYPE(tm->operand_types[0]) == OP_Smem || + OPTYPE(tm->operand_types[1]) == OP_Smem || + OPTYPE(tm->operand_types[2]) == OP_Smem || + OPTYPE(tm->operand_types[1]) == OP_Sind); +} + +/* always returns 1 (whether an insn template was found) since we provide an + "unknown instruction" template */ +static int +get_instruction (info, addr, opcode, insn) + disassemble_info *info; + bfd_vma addr; + unsigned short opcode; + instruction *insn; +{ + template * tm; + partemplate * ptm; + + insn->parallel = 0; + for (tm = (template *)tic54x_optab; tm->name; tm++) + { + if (tm->opcode == (opcode & tm->mask)) + { + /* a few opcodes span two words */ + if (tm->flags & FL_EXT) + { + /* if lk addressing is used, the second half of the opcode gets + pushed one word later */ + bfd_byte opbuf[2]; + bfd_vma addr2 = addr + 1 + has_lkaddr(opcode, tm); + int status = (*info->read_memory_func)(addr2, opbuf, 2, info); + if (status == 0) + { + unsigned short opcode2 = bfd_getl16(opbuf); + if (tm->opcode2 == (opcode2 & tm->mask2)) + { + insn->tm = tm; + return 1; + } + } + } + else + { + insn->tm = tm; + return 1; + } + } + } + for (ptm = (partemplate *)tic54x_paroptab; ptm->name; ptm++) + { + if (ptm->opcode == (opcode & ptm->mask)) + { + insn->parallel = 1; + insn->ptm = ptm; + return 1; + } + } + + insn->tm = (template *)&tic54x_unknown_opcode; + return 1; +} + +static int +get_insn_size (opcode, insn) + unsigned short opcode; + instruction *insn; +{ + int size; + + if (insn->parallel) + { + /* only non-parallel instructions support lk addressing */ + size = insn->ptm->words; + } + else + { + size = insn->tm->words + has_lkaddr(opcode, insn->tm); + } + + return size; +} + +int +print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext) + disassemble_info *info; + bfd_vma memaddr; + unsigned short opcode; + char *tm_name; + enum optype tm_operands[]; + int size; + int ext; +{ + static int n; + /* string storage for multiple operands */ + char operand[4][64] = { {0},{0},{0},{0}, }; + bfd_byte buf[2]; + unsigned long opcode2, lkaddr; + enum optype src = OP_None; + enum optype dst = OP_None; + int i, shift; + char *comma = ""; + + info->fprintf_func (info->stream, "%-7s", tm_name); + + if (size > 1) + { + int status = (*info->read_memory_func) (memaddr+1, buf, 2, info); + if (status != 0) + return 0; + lkaddr = opcode2 = bfd_getl16(buf); + if (size > 2) + { + status = (*info->read_memory_func) (memaddr+2, buf, 2, info); + if (status != 0) + return 0; + opcode2 = bfd_getl16(buf); + } + } + + for (i=0;i < MAX_OPERANDS && OPTYPE(tm_operands[i]) != OP_None;i++) + { + char *next_comma = ","; + int optional = (tm_operands[i] & OPT) != 0; + + switch (OPTYPE(tm_operands[i])) + { + case OP_Xmem: + sprint_dual_address (info, operand[i], XMEM(opcode)); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_Ymem: + sprint_dual_address (info, operand[i], YMEM(opcode)); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_Smem: + case OP_Sind: + case OP_Lmem: + info->fprintf_func (info->stream, "%s", comma); + if (INDIRECT(opcode)) + { + if (MOD(opcode) >= 12) + { + bfd_vma addr = lkaddr; + int arf = ARF(opcode); + int mod = MOD(opcode); + if (mod == 15) + info->fprintf_func (info->stream, "*("); + else + info->fprintf_func (info->stream, "*%sar%d(", + (mod == 13 || mod == 14 ? "+" : ""), + arf); + (*(info->print_address_func))((bfd_vma)addr, info); + info->fprintf_func (info->stream, ")%s", + mod == 14 ? "%" : ""); + } + else + { + sprint_indirect_address (info, operand[i], opcode); + info->fprintf_func (info->stream, "%s", operand[i]); + } + } + else + { + /* FIXME -- use labels (print_address_func) */ + /* in order to do this, we need to guess what DP is */ + sprint_direct_address (info, operand[i], opcode); + info->fprintf_func (info->stream, "%s", operand[i]); + } + break; + case OP_dmad: + info->fprintf_func (info->stream, "%s", comma); + (*(info->print_address_func))((bfd_vma)opcode2, info); + break; + case OP_xpmad: + /* upper 7 bits of address are in the opcode */ + opcode2 += ((unsigned long)opcode & 0x7F) << 16; + /* fall through */ + case OP_pmad: + info->fprintf_func (info->stream, "%s", comma); + (*(info->print_address_func))((bfd_vma)opcode2, info); + break; + case OP_MMRX: + sprint_mmr (info, operand[i], MMRX(opcode)); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_MMRY: + sprint_mmr (info, operand[i], MMRY(opcode)); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_MMR: + sprint_mmr (info, operand[i], MMR(opcode)); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_PA: + sprintf (operand[i], "pa%d", (unsigned)opcode2); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_SRC: + src = SRC(ext ? opcode2 : opcode) ? OP_B : OP_A; + sprintf (operand[i], (src == OP_B) ? "b" : "a"); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_SRC1: + src = SRC1(ext ? opcode2 : opcode) ? OP_B : OP_A; + sprintf (operand[i], (src == OP_B) ? "b" : "a"); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_RND: + dst = DST(opcode) ? OP_B : OP_A; + sprintf (operand[i], (dst == OP_B) ? "a" : "b"); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_DST: + dst = DST(ext ? opcode2 : opcode) ? OP_B : OP_A; + if (!optional || dst != src) + { + sprintf (operand[i], (dst == OP_B) ? "b" : "a"); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + } + else + next_comma = comma; + break; + case OP_B: + sprintf (operand[i], "b"); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_A: + sprintf (operand[i], "a"); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_ARX: + sprintf (operand[i],"ar%d", (int)ARX(opcode)); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_SHIFT: + shift = SHIFT(ext ? opcode2 : opcode); + if (!optional || shift != 0) + { + sprintf (operand[i],"%d", shift); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + } + else + next_comma = comma; + break; + case OP_SHFT: + shift = SHFT(opcode); + if (!optional || shift != 0) + { + sprintf (operand[i],"%d", (unsigned)shift); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + } + else + next_comma = comma; + break; + case OP_lk: + sprintf (operand[i],"#%d", (int)(short)opcode2); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_T: + sprintf (operand[i], "t"); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_TS: + sprintf (operand[i], "ts"); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_k8: + sprintf (operand[i], "%d", (int)((signed char)(opcode & 0xFF))); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_16: + sprintf (operand[i], "16"); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_ASM: + sprintf (operand[i], "asm"); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_BITC: + sprintf (operand[i], "%d", (int)(opcode & 0xF)); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_CC: + /* put all CC operands in the same operand */ + sprint_condition (info, operand[i], opcode); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + i = MAX_OPERANDS; + break; + case OP_CC2: + sprint_cc2 (info, operand[i], opcode); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_CC3: + { + const char *code[] = { "eq", "lt", "gt", "neq" }; + sprintf (operand[i], code[CC3(opcode)]); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + } + case OP_123: + { + int code = (opcode>>8) & 0x3; + sprintf (operand[i], "%d", (code == 0) ? 1 : (code == 2) ? 2 : 3); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + } + case OP_k5: + sprintf (operand[i], "#%d", + (int)(((signed char)opcode & 0x1F) << 3)>>3); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_k8u: + sprintf (operand[i], "#%d", (unsigned)(opcode & 0xFF)); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_k3: + sprintf (operand[i], "#%d", (int)(opcode & 0x7)); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_lku: + sprintf (operand[i], "#%d", (unsigned)opcode2); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_N: + n = (opcode >> 9) & 0x1; + sprintf (operand[i], "st%d", n); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_SBIT: + { + const char *status0[] = { + "0", "1", "2", "3", "4", "5", "6", "7", "8", + "ovb", "ova", "c", "tc", "13", "14", "15" + }; + const char *status1[] = { + "0", "1", "2", "3", "4", + "cmpt", "frct", "c16", "sxm", "ovm", "10", + "intm", "hm", "xf", "cpl", "braf" + }; + sprintf (operand[i], "%s", + n ? status1[SBIT(opcode)] : status0[SBIT(opcode)]); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + } + case OP_12: + sprintf (operand[i], "%d", (int)((opcode >> 9)&1) + 1); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_TRN: + sprintf (operand[i], "trn"); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_DP: + sprintf (operand[i], "dp"); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_k9: + /* FIXME-- this is DP, print the original address? */ + sprintf (operand[i], "#%d", (int)(opcode & 0x1FF)); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_ARP: + sprintf (operand[i], "arp"); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + case OP_031: + sprintf (operand[i], "%d", (int)(opcode & 0x1F)); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + default: + sprintf (operand[i], "??? (0x%x)", tm_operands[i]); + info->fprintf_func (info->stream, "%s%s", comma, operand[i]); + break; + } + comma = next_comma; + } + return 1; +} + +static int +print_parallel_instruction (info, memaddr, opcode, ptm, size) + disassemble_info *info; + bfd_vma memaddr; + unsigned short opcode; + partemplate *ptm; + int size; +{ + print_instruction (info, memaddr, opcode, + ptm->name, ptm->operand_types, size, 0); + info->fprintf_func (info->stream, " || "); + return print_instruction (info, memaddr, opcode, + ptm->parname, ptm->paroperand_types, size, 0); +} + +static int +sprint_dual_address (info, buf, code) + disassemble_info *info; + char buf[]; + unsigned short code; +{ + const char *formats[] = { + "*ar%d", + "*ar%d-", + "*ar%d+", + "*ar%d+0%%", + }; + return sprintf (buf, formats[XMOD(code)], XARX(code)); +} + +static int +sprint_indirect_address (info, buf, opcode) + disassemble_info *info; + char buf[]; + unsigned short opcode; +{ + const char *formats[] = { + "*ar%d", + "*ar%d-", + "*ar%d+", + "*+ar%d", + "*ar%d-0B", + "*ar%d-0", + "*ar%d+0", + "*ar%d+0B", + "*ar%d-%%", + "*ar%d-0%%", + "*ar%d+%%", + "*ar%d+0%%", + }; + return sprintf (buf, formats[MOD(opcode)], ARF(opcode)); +} + +static int +sprint_direct_address (info, buf, opcode) + disassemble_info *info; + char buf[]; + unsigned short opcode; +{ + /* FIXME -- look up relocation if available */ + return sprintf (buf, "0x??%02x", (int)(opcode & 0x7F)); +} + +static int +sprint_mmr (info, buf, mmr) + disassemble_info *info; + char buf[]; + int mmr; +{ + symbol *reg = (symbol *)mmregs; + while (reg->name != NULL) + { + if (mmr == reg->value) + { + sprintf (buf, "%s", (reg+1)->name); + return 1; + } + ++reg; + } + sprintf (buf, "MMR(%d)", mmr); // FIXME -- different targets + return 0; +} + +static int +sprint_cc2 (info, buf, opcode) + disassemble_info *info; + char *buf; + unsigned short opcode; +{ + const char *cc2[] = { + "??", "??", "ageq", "alt", "aneq", "aeq", "agt", "aleq", + "??", "??", "bgeq", "blt", "bneq", "beq", "bgt", "bleq", + }; + return sprintf (buf, "%s", cc2[opcode & 0xF]); +} + +static int +sprint_condition (info, buf, opcode) + disassemble_info *info; + char *buf; + unsigned short opcode; +{ + char *start = buf; + const char *cmp[] = { + "??", "??", "geq", "lt", "neq", "eq", "gt", "leq" + }; + if (opcode & 0x40) + { + char acc = (opcode & 0x8) ? 'b' : 'a'; + if (opcode & 0x7) + buf += sprintf (buf, "%c%s%s", acc, cmp[(opcode&0x7)], + (opcode&0x20) ? ", " : ""); + if (opcode & 0x20) + buf += sprintf (buf, "%c%s", acc, (opcode&0x10) ? "ov" : "nov"); + } + else if (opcode & 0x3F) + { + if (opcode & 0x30) + buf += sprintf (buf, "%s%s", + ((opcode & 0x30) == 0x30) ? "tc" : "ntc", + (opcode & 0x0F) ? ", " : ""); + if (opcode & 0x0C) + buf += sprintf (buf, "%s%s", + ((opcode & 0x0C) == 0x0C) ? "c" : "nc", + (opcode & 0x03) ? ", " : ""); + if (opcode & 0x03) + buf += sprintf (buf, "%s", + ((opcode & 0x03) == 0x03) ? "bio" : "nbio"); + } + else + buf += sprintf (buf, "unc"); + + return buf - start; +} diff -upr --new-file binutils-2.9.5.0.41/opcodes/tic54x-opc.c binutils-2.9.5.0.42/opcodes/tic54x-opc.c --- binutils-2.9.5.0.41/opcodes/tic54x-opc.c Wed Dec 31 16:00:00 1969 +++ binutils-2.9.5.0.42/opcodes/tic54x-opc.c Fri May 12 08:03:13 2000 @@ -0,0 +1,477 @@ +/* Table of opcodes for the Texas Instruments TMS320C54X + Copyright (C) 1999, 2000 Free Software Foundation, Inc. + Contributed by Timothy Wall (twall@cygnus.com) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. */ + +#include +#include "ansidecl.h" +#include "opcode/tic54x.h" + +/* these are the only register names not found in mmregs */ +const symbol regs[] = { + { "AR0", 16 }, { "ar0", 16 }, + { "AR1", 17 }, { "ar1", 17 }, + { "AR2", 18 }, { "ar2", 18 }, + { "AR3", 19 }, { "ar3", 19 }, + { "AR4", 20 }, { "ar4", 20 }, + { "AR5", 21 }, { "ar5", 21 }, + { "AR6", 22 }, { "ar6", 22 }, + { "AR7", 23 }, { "ar7", 23 }, + { NULL, } +}; + +/* status bits, MM registers, condition codes, etc */ +/* some symbols are only valid for certain chips... */ +const symbol mmregs[] = { + { "IMR", 0 }, { "imr", 0 }, + { "IFR", 1 }, { "ifr", 1 }, + { "ST0", 6 }, { "st0", 6 }, + { "ST1", 7 }, { "st1", 7 }, + { "AL", 8 }, { "al", 8 }, + { "AH", 9 }, { "ah", 9 }, + { "AG", 10 }, { "ag", 10 }, + { "BL", 11 }, { "bl", 11 }, + { "BH", 12 }, { "bh", 12 }, + { "BG", 13 }, { "bg", 13 }, + { "T", 14 }, { "t", 14 }, + { "TRN", 15 }, { "trn", 15 }, + { "AR0", 16 }, { "ar0", 16 }, + { "AR1", 17 }, { "ar1", 17 }, + { "AR2", 18 }, { "ar2", 18 }, + { "AR3", 19 }, { "ar3", 19 }, + { "AR4", 20 }, { "ar4", 20 }, + { "AR5", 21 }, { "ar5", 21 }, + { "AR6", 22 }, { "ar6", 22 }, + { "AR7", 23 }, { "ar7", 23 }, + { "SP", 24 }, { "sp", 24 }, + { "BK", 25 }, { "bk", 25 }, + { "BRC", 26 }, { "brc", 26 }, + { "RSA", 27 }, { "rsa", 27 }, + { "REA", 28 }, { "rea", 28 }, + { "PMST",29 }, { "pmst",29 }, + { "XPC", 30 }, { "xpc", 30 }, /* 'c548 only */ + /* optional peripherals */ /* optional peripherals */ + { "M1F", 31 }, { "m1f", 31 }, + { "DRR0",0x20 }, { "drr0",0x20 }, + { "BDRR0",0x20 }, { "bdrr0",0x20 }, /* 'c543, 545 */ + { "DXR0",0x21 }, { "dxr0",0x21 }, + { "BDXR0",0x21 }, { "bdxr0",0x21 }, /* 'c543, 545 */ + { "SPC0",0x22 }, { "spc0",0x22 }, + { "BSPC0",0x22 }, { "bspc0",0x22 }, /* 'c543, 545 */ + { "SPCE0",0x23 }, { "spce0",0x23 }, + { "BSPCE0",0x23 }, { "bspce0",0x23 }, /* 'c543, 545 */ + { "TIM", 0x24 }, { "tim", 0x24 }, + { "PRD", 0x25 }, { "prd", 0x25 }, + { "TCR", 0x26 }, { "tcr", 0x26 }, + { "SWWSR",0x28 }, { "swwsr",0x28 }, + { "BSCR",0x29 }, { "bscr",0x29 }, + { "HPIC",0x2C }, { "hpic",0x2c }, + /* 'c541, 'c545 */ /* 'c541, 'c545 */ + { "DRR1",0x30 }, { "drr1",0x30 }, + { "DXR1",0x31 }, { "dxr1",0x31 }, + { "SPC1",0x32 }, { "spc1",0x32 }, + /* 'c542, 'c543 */ /* 'c542, 'c543 */ + { "TRCV",0x30 }, { "trcv",0x30 }, + { "TDXR",0x31 }, { "tdxr",0x31 }, + { "TSPC",0x32 }, { "tspc",0x32 }, + { "TCSR",0x33 }, { "tcsr",0x33 }, + { "TRTA",0x34 }, { "trta",0x34 }, + { "TRAD",0x35 }, { "trad",0x35 }, + { "AXR0",0x38 }, { "axr0",0x38 }, + { "BKX0",0x39 }, { "bkx0",0x39 }, + { "ARR0",0x3A }, { "arr0",0x3a }, + { "BKR0",0x3B }, { "bkr0",0x3b }, + /* 'c545, 'c546, 'c548 */ /* 'c545, 'c546, 'c548 */ + { "CLKMD",0x58 }, { "clkmd",0x58 }, + /* 'c548 */ /* 'c548 */ + { "AXR1",0x3C }, { "axr1",0x3c }, + { "BKX1",0x3D }, { "bkx1",0x3d }, + { "ARR1",0x3E }, { "arr1",0x3e }, + { "BKR1",0x3F }, { "bkr1",0x3f }, + { "BDRR1",0x40 }, { "bdrr1",0x40 }, + { "BDXR1",0x41 }, { "bdxr1",0x41 }, + { "BSPC1",0x42 }, { "bspc1",0x42 }, + { "BSPCE1",0x43 }, { "bspce1",0x43 }, + { NULL }, +}; + +const symbol condition_codes[] = { + /* condition codes */ + { "UNC", 0 }, { "unc", 0 }, +#define CC1 0x40 +#define CCB 0x08 +#define CCEQ 0x05 +#define CCNEQ 0x04 +#define CCLT 0x03 +#define CCLEQ 0x07 +#define CCGT 0x06 +#define CCGEQ 0x02 +#define CCOV 0x70 +#define CCNOV 0x60 +#define CCBIO 0x03 +#define CCNBIO 0x02 +#define CCTC 0x30 +#define CCNTC 0x20 +#define CCC 0x0C +#define CCNC 0x08 + { "aeq", CC1|CCEQ }, { "AEQ", CC1|CCEQ }, + { "aneq", CC1|CCNEQ }, { "ANEQ", CC1|CCNEQ }, + { "alt", CC1|CCLT }, { "ALT", CC1|CCLT }, + { "aleq", CC1|CCLEQ }, { "ALEQ", CC1|CCLEQ }, + { "agt", CC1|CCGT }, { "AGT", CC1|CCGT }, + { "ageq", CC1|CCGEQ }, { "AGEQ", CC1|CCGEQ }, + { "aov", CC1|CCOV }, { "AOV", CC1|CCOV }, + { "anov", CC1|CCNOV }, { "ANOV", CC1|CCNOV }, + { "beq", CC1|CCB|CCEQ }, { "BEQ", CC1|CCB|CCEQ }, + { "bneq", CC1|CCB|CCNEQ }, { "BNEQ", CC1|CCB|CCNEQ }, + { "blt", CC1|CCB|CCLT }, { "BLT", CC1|CCB|CCLT }, + { "bleq", CC1|CCB|CCLEQ }, { "BLEQ", CC1|CCB|CCLEQ }, + { "bgt", CC1|CCB|CCGT }, { "BGT", CC1|CCB|CCGT }, + { "bgeq", CC1|CCB|CCGEQ }, { "BGEQ", CC1|CCB|CCGEQ }, + { "bov", CC1|CCB|CCOV }, { "BOV", CC1|CCB|CCOV }, + { "bnov", CC1|CCB|CCNOV }, { "BNOV", CC1|CCB|CCNOV }, + { "tc", CCTC }, { "TC", CCTC }, + { "ntc", CCNTC }, { "NTC", CCNTC }, + { "c", CCC }, { "C", CCC }, + { "nc", CCNC }, { "NC", CCNC }, + { "bio", CCBIO }, { "BIO", CCBIO }, + { "nbio", CCNBIO }, { "NBIO", CCNBIO }, + { NULL, } +}; + +const symbol cc2_codes[] = { + { "UNC", 0 }, { "unc", 0 }, + { "AEQ", 5 }, { "aeq", 5 }, + { "ANEQ", 4 }, { "aneq", 4 }, + { "AGT", 6 }, { "agt", 6 }, + { "ALT", 3 }, { "alt", 3 }, + { "ALEQ", 7 }, { "aleq", 7 }, + { "AGEQ", 2 }, { "ageq", 2 }, + { "BEQ", 13 }, { "beq", 13 }, + { "BNEQ", 12 },{ "bneq", 12 }, + { "BGT", 14 }, { "bgt", 14 }, + { "BLT", 11 }, { "blt", 11 }, + { "BLEQ", 15 },{ "bleq", 15 }, + { "BGEQ", 10 },{ "bgeq", 10 }, + { NULL }, +}; + +const symbol cc3_codes[] = { + { "EQ", 0x0000 }, { "eq", 0x0000 }, + { "LT", 0x0100 }, { "lt", 0x0100 }, + { "GT", 0x0200 }, { "gt", 0x0200 }, + { "NEQ", 0x0300 }, { "neq", 0x0300 }, + { "0", 0x0000 }, + { "1", 0x0100 }, + { "2", 0x0200 }, + { "3", 0x0300 }, + { "00", 0x0000 }, + { "01", 0x0100 }, + { "10", 0x0200 }, + { "11", 0x0300 }, + { NULL }, +}; + +/* FIXME -- also allow decimal digits */ +const symbol status_bits[] = { + /* status register 0 */ + { "TC", 12 }, { "tc", 12 }, + { "C", 11 }, { "c", 11 }, + { "OVA", 10 }, { "ova", 10 }, + { "OVB", 9 }, { "ovb", 9 }, + /* status register 1 */ + { "BRAF",15 }, { "braf",15 }, + { "CPL", 14 }, { "cpl", 14 }, + { "XF", 13 }, { "xf", 13 }, + { "HM", 12 }, { "hm", 12 }, + { "INTM",11 }, { "intm",11 }, + { "OVM", 9 }, { "ovm", 9 }, + { "SXM", 8 }, { "sxm", 8 }, + { "C16", 7 }, { "c16", 7 }, + { "FRCT", 6 }, { "frct", 6 }, + { "CMPT", 5 }, { "cmpt", 5 }, + { NULL }, +}; + +const char *misc_symbols[] = { + "ARP", "arp", + "DP", "dp", + "ASM", "asm", + "TS", "ts", + NULL +}; + +/* Due to the way instructions are hashed and scanned in + gas/config/tc-tic54x.c, all identically-named opcodes must be consecutively + placed + + Items marked with "PREFER" have been moved prior to a more costly + instruction with a similar operand format. + + Mnemonics which can take either a predefined symbol or a memory reference + as an argument are arranged so that the more restrictive (predefined + symbol) version is checked first (marked "SRC"). +*/ +const template tic54x_unknown_opcode = + { "???", 1,0,0,0x0000, 0x0000, {0}, }; +const template tic54x_optab[] = { + /* these must precede bc/bcd, cc/ccd to avoid misinterpretation */ + { "fb", 2,1,1,0xF880, 0xFF80, {OP_xpmad}, B_BRANCH|FL_FAR|FL_NR, }, + { "fbd", 2,1,1,0xFA80, 0xFF80, {OP_xpmad}, B_BRANCH|FL_FAR|FL_DELAY|FL_NR, }, + { "fcall", 2,1,1,0xF980, 0xFF80, {OP_xpmad}, B_BRANCH|FL_FAR|FL_NR, }, + { "fcalld",2,1,1,0xFB80, 0xFF80, {OP_xpmad}, B_BRANCH|FL_FAR|FL_DELAY|FL_NR, }, + + { "abdst", 1,2,2,0xE300, 0xFF00, {OP_Xmem,OP_Ymem}, }, + { "abs", 1,1,2,0xF485, 0xFCFF, {OP_SRC,OPT|OP_DST}, }, + { "add", 1,1,3,0xF400, 0xFCE0, {OP_SRC,OPT|OP_SHIFT,OPT|OP_DST}, },/*SRC*/ + { "add", 1,2,3,0xF480, 0xFCFF, {OP_SRC,OP_ASM,OPT|OP_DST}, },/*SRC*/ + { "add", 1,2,2,0x0000, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "add", 1,3,3,0x0400, 0xFE00, {OP_Smem,OP_TS,OP_SRC1}, FL_SMR }, + { "add", 1,3,4,0x3C00, 0xFC00, {OP_Smem,OP_16,OP_SRC,OPT|OP_DST}, FL_SMR}, + { "add", 1,3,3,0x9000, 0xFE00, {OP_Xmem,OP_SHFT,OP_SRC1}, },/*PREFER*/ + { "add", 2,2,4,0x6F00, 0xFF00, {OP_Smem,OPT|OP_SHIFT,OP_SRC,OPT|OP_DST}, + FL_EXT|FL_SMR, 0x0C00, 0xFCE0}, + { "add", 1,3,3,0xA000, 0xFE00, {OP_Xmem,OP_Ymem,OP_DST}, }, + { "add", 2,2,4,0xF000, 0xFCF0, {OP_lk,OPT|OP_SHIFT,OP_SRC,OPT|OP_DST}, }, + { "add", 2,3,4,0xF060, 0xFCFF, {OP_lk,OP_16,OP_SRC,OPT|OP_DST}, }, + { "addc", 1,2,2,0x0600, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "addm", 2,2,2,0x6B00, 0xFF00, {OP_lk,OP_Smem}, FL_NR|FL_SMR, }, + { "adds", 1,2,2,0x0200, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "and", 1,1,3,0xF080, 0xFCE0, {OP_SRC,OPT|OP_SHIFT,OPT|OP_DST}, }, + { "and", 1,2,2,0x1800, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "and", 2,2,4,0xF030, 0xFCF0, {OP_lk,OPT|OP_SHFT,OP_SRC,OPT|OP_DST}, }, + { "and", 2,3,4,0xF063, 0xFCFF, {OP_lk,OP_16,OP_SRC,OPT|OP_DST}, }, + { "andm", 2,2,2,0x6800, 0xFF00, {OP_lk,OP_Smem}, FL_NR, }, + { "b", 2,1,1,0xF073, 0xFFFF, {OP_pmad}, B_BRANCH|FL_NR, }, + { "bd", 2,1,1,0xF273, 0xFFFF, {OP_pmad}, B_BRANCH|FL_DELAY|FL_NR, }, + { "bacc", 1,1,1,0xF4E2, 0xFEFF, {OP_SRC1}, B_BACC|FL_NR, }, + { "baccd", 1,1,1,0xF6E2, 0xFEFF, {OP_SRC1}, B_BACC|FL_DELAY|FL_NR, }, + { "banz", 2,2,2,0x6C00, 0xFF00, {OP_pmad,OP_Sind}, B_BRANCH|FL_NR, }, + { "banzd", 2,2,2,0x6E00, 0xFF00, {OP_pmad,OP_Sind}, B_BRANCH|FL_DELAY|FL_NR, }, + { "bc", 2,2,4,0xF800, 0xFF00, {OP_pmad,OP_CC,OPT|OP_CC,OPT|OP_CC}, + B_BRANCH|FL_NR, }, + { "bcd", 2,2,4,0xFA00, 0xFF00, {OP_pmad,OP_CC,OPT|OP_CC,OPT|OP_CC}, + B_BRANCH|FL_DELAY|FL_NR, }, + { "bit", 1,2,2,0x9600, 0xFF00, {OP_Xmem,OP_BITC}, }, + { "bitf", 2,2,2,0x6100, 0xFF00, {OP_Smem,OP_lk}, FL_SMR }, + { "bitt", 1,1,1,0x3400, 0xFF00, {OP_Smem}, FL_SMR }, + { "cala", 1,1,1,0xF4E3, 0xFEFF, {OP_SRC1}, B_BACC|FL_NR, }, + { "calad", 1,1,1,0xF6E3, 0xFEFF, {OP_SRC1}, B_BACC|FL_DELAY|FL_NR, }, + { "call", 2,1,1,0xF074, 0xFFFF, {OP_pmad}, B_BRANCH|FL_NR, }, + { "calld", 2,1,1,0xF274, 0xFFFF, {OP_pmad}, B_BRANCH|FL_DELAY|FL_NR, }, + { "cc", 2,2,4,0xF900, 0xFF00, {OP_pmad,OP_CC,OPT|OP_CC,OPT|OP_CC}, + B_BRANCH|FL_NR, }, + { "ccd", 2,2,4,0xFB00, 0xFF00, {OP_pmad,OP_CC,OPT|OP_CC,OPT|OP_CC}, + B_BRANCH|FL_DELAY|FL_NR, }, + { "cmpl", 1,1,2,0xF493, 0xFCFF, {OP_SRC,OPT|OP_DST}, }, + { "cmpm", 2,2,2,0x6000, 0xFF00, {OP_Smem,OP_lk}, FL_SMR }, + { "cmpr", 1,2,2,0xF4A8, 0xFCF8, {OP_CC3,OP_ARX}, FL_NR, }, + { "cmps", 1,2,2,0x8E00, 0xFE00, {OP_SRC1,OP_Smem}, }, + { "dadd", 1,2,3,0x5000, 0xFC00, {OP_Lmem,OP_SRC,OPT|OP_DST}, }, + { "dadst", 1,2,2,0x5A00, 0xFE00, {OP_Lmem,OP_DST}, }, + { "delay", 1,1,1,0x4D00, 0xFF00, {OP_Smem}, FL_SMR }, + { "dld", 1,2,2,0x5600, 0xFE00, {OP_Lmem,OP_DST}, }, + { "drsub", 1,2,2,0x5800, 0xFE00, {OP_Lmem,OP_SRC1}, }, + { "dsadt", 1,2,2,0x5E00, 0xFE00, {OP_Lmem,OP_DST}, }, + { "dst", 1,2,2,0x4E00, 0xFE00, {OP_SRC1,OP_Lmem}, FL_NR, }, + { "dsub", 1,2,2,0x5400, 0xFE00, {OP_Lmem,OP_SRC1}, }, + { "dsubt", 1,2,2,0x5C00, 0xFE00, {OP_Lmem,OP_DST}, }, + { "exp", 1,1,1,0xF48E, 0xFEFF, {OP_SRC1}, }, + { "fbacc", 1,1,1,0xF4E6, 0xFEFF, {OP_SRC1}, B_BACC|FL_FAR|FL_NR, }, + { "fbaccd",1,1,1,0xF6E6, 0xFEFF, {OP_SRC1}, B_BACC|FL_FAR|FL_DELAY|FL_NR, }, + { "fcala", 1,1,1,0xF4E7, 0xFEFF, {OP_SRC1}, B_BACC|FL_FAR|FL_NR, }, + { "fcalad",1,1,1,0xF6E7, 0xFEFF, {OP_SRC1}, B_BACC|FL_FAR|FL_DELAY|FL_NR, }, + { "firs", 2,3,3,0xE000, 0xFF00, {OP_Xmem,OP_Ymem,OP_pmad}, }, + { "frame", 1,1,1,0xEE00, 0xFF00, {OP_k8}, }, + { "fret", 1,0,0,0xF4E4, 0xFFFF, {OP_None}, B_RET|FL_FAR|FL_NR, }, + { "fretd", 1,0,0,0xF6E4, 0xFFFF, {OP_None}, B_RET|FL_FAR|FL_DELAY|FL_NR, }, + { "frete", 1,0,0,0xF4E5, 0xFFFF, {OP_None}, B_RET|FL_FAR|FL_NR, }, + { "freted",1,0,0,0xF6E5, 0xFFFF, {OP_None}, B_RET|FL_FAR|FL_DELAY|FL_NR, }, + { "idle", 1,1,1,0xF4E1, 0xFCFF, {OP_123}, FL_NR, }, + { "intr", 1,1,1,0xF7C0, 0xFFE0, {OP_031}, B_BRANCH|FL_NR, }, + { "ld", 1,2,3,0xF482, 0xFCFF, {OP_SRC,OP_ASM,OPT|OP_DST}, },/*SRC*/ + { "ld", 1,2,3,0xF440, 0xFCE0, {OP_SRC,OPT|OP_SHIFT,OP_DST}, },/*SRC*/ + /* alternate syntax */ + { "ld", 1,2,3,0xF440, 0xFCE0, {OP_SRC,OP_SHIFT,OPT|OP_DST}, },/*SRC*/ + { "ld", 1,2,2,0xE800, 0xFE00, {OP_k8u,OP_DST}, },/*SRC*/ + { "ld", 1,2,2,0xED00, 0xFFE0, {OP_k5,OP_ASM}, },/*SRC*/ + { "ld", 1,2,2,0xF4A0, 0xFFF8, {OP_k3,OP_ARP}, FL_NR, },/*SRC*/ + { "ld", 1,2,2,0xEA00, 0xFE00, {OP_k9,OP_DP}, FL_NR, },/*PREFER */ + { "ld", 1,2,2,0x3000, 0xFF00, {OP_Smem,OP_T}, FL_SMR },/*SRC*/ + { "ld", 1,2,2,0x4600, 0xFF00, {OP_Smem,OP_DP}, FL_SMR },/*SRC*/ + { "ld", 1,2,2,0x3200, 0xFF00, {OP_Smem,OP_ASM}, FL_SMR },/*SRC*/ + { "ld", 1,2,2,0x1000, 0xFE00, {OP_Smem,OP_DST}, FL_SMR }, + { "ld", 1,3,3,0x1400, 0xFE00, {OP_Smem,OP_TS,OP_DST}, FL_SMR }, + { "ld", 1,3,3,0x4400, 0xFE00, {OP_Smem,OP_16,OP_DST}, FL_SMR }, + { "ld", 1,3,3,0x9400, 0xFE00, {OP_Xmem,OP_SHFT,OP_DST}, },/*PREFER*/ + { "ld", 2,2,3,0x6F00, 0xFF00, {OP_Smem,OPT|OP_SHIFT,OP_DST}, + FL_EXT|FL_SMR, 0x0C40, 0xFEE0 }, + { "ld", 2,2,3,0xF020, 0xFEF0, {OP_lk,OPT|OP_SHFT,OP_DST}, }, + { "ld", 2,3,3,0xF062, 0xFEFF, {OP_lk,OP_16,OP_DST}, }, + { "ldm", 1,2,2,0x4800, 0xFE00, {OP_MMR,OP_DST}, }, + { "ldr", 1,2,2,0x1600, 0xFE00, {OP_Smem,OP_DST}, FL_SMR }, + { "ldu", 1,2,2,0x1200, 0xFE00, {OP_Smem,OP_DST}, FL_SMR }, + { "ldx", 2,3,3,0xF062, 0xFEFF, {OP_xpmad_ms7,OP_16,OP_DST}, FL_FAR},/*pseudo-op*/ + { "lms", 1,2,2,0xE100, 0xFF00, {OP_Xmem,OP_Ymem}, }, + { "ltd", 1,1,1,0x4C00, 0xFF00, {OP_Smem}, FL_SMR }, + { "mac", 1,2,2,0x2800, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "mac", 1,3,4,0xB000, 0xFC00, {OP_Xmem,OP_Ymem,OP_SRC,OPT|OP_DST}, }, + { "mac", 2,2,3,0xF067, 0xFCFF, {OP_lk,OP_SRC,OPT|OP_DST}, }, + { "mac", 2,3,4,0x6400, 0xFC00, {OP_Smem,OP_lk,OP_SRC,OPT|OP_DST}, FL_SMR }, + { "macr", 1,2,2,0x2A00, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "macr", 1,3,4,0xB400, 0xFC00, {OP_Xmem,OP_Ymem,OP_SRC,OPT|OP_DST},FL_SMR}, + { "maca", 1,2,3,0xF488, 0xFCFF, {OP_T,OP_SRC,OPT|OP_DST}, FL_SMR },/*SRC*/ + { "maca", 1,1,2,0x3500, 0xFF00, {OP_Smem,OPT|OP_B}, FL_SMR }, + { "macar", 1,2,3,0xF489, 0xFCFF, {OP_T,OP_SRC,OPT|OP_DST}, FL_SMR },/*SRC*/ + { "macar", 1,1,2,0x3700, 0xFF00, {OP_Smem,OPT|OP_B}, FL_SMR }, + { "macd", 2,3,3,0x7A00, 0xFE00, {OP_Smem,OP_pmad,OP_SRC1}, FL_SMR }, + { "macp", 2,3,3,0x7800, 0xFE00, {OP_Smem,OP_pmad,OP_SRC1}, FL_SMR }, + { "macsu", 1,3,3,0xA600, 0xFE00, {OP_Xmem,OP_Ymem,OP_SRC1}, }, + { "mar", 1,1,1,0x6D00, 0xFF00, {OP_Smem}, }, + { "mas", 1,2,2,0x2C00, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "mas", 1,3,4,0xB800, 0xFC00, {OP_Xmem,OP_Ymem,OP_SRC,OPT|OP_DST}, }, + { "masr", 1,2,2,0x2E00, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "masr", 1,3,4,0xBC00, 0xFC00, {OP_Xmem,OP_Ymem,OP_SRC,OPT|OP_DST}, }, + { "masa", 1,2,3,0xF48A, 0xFCFF, {OP_T,OP_SRC,OPT|OP_DST}, },/*SRC*/ + { "masa", 1,1,2,0x3300, 0xFF00, {OP_Smem,OPT|OP_B}, FL_SMR }, + { "masar", 1,2,3,0xF48B, 0xFCFF, {OP_T,OP_SRC,OPT|OP_DST}, }, + { "max", 1,1,1,0xF486, 0xFEFF, {OP_DST}, }, + { "min", 1,1,1,0xF487, 0xFEFF, {OP_DST}, }, + { "mpy", 1,2,2,0x2000, 0xFE00, {OP_Smem,OP_DST}, FL_SMR }, + { "mpy", 1,3,3,0xA400, 0xFE00, {OP_Xmem,OP_Ymem,OP_DST}, }, + { "mpy", 2,3,3,0x6200, 0xFE00, {OP_Smem,OP_lk,OP_DST}, FL_SMR }, + { "mpy", 2,2,2,0xF066, 0xFEFF, {OP_lk,OP_DST}, }, + { "mpyr", 1,2,2,0x2200, 0xFE00, {OP_Smem,OP_DST}, FL_SMR }, + { "mpya", 1,1,1,0xF48C, 0xFEFF, {OP_DST}, }, /*SRC*/ + { "mpya", 1,1,1,0x3100, 0xFF00, {OP_Smem}, FL_SMR }, + { "mpyu", 1,2,2,0x2400, 0xFE00, {OP_Smem,OP_DST}, FL_SMR }, + { "mvdd", 1,2,2,0xE500, 0xFF00, {OP_Xmem,OP_Ymem}, }, + { "mvdk", 2,2,2,0x7100, 0xFF00, {OP_Smem,OP_dmad}, FL_SMR }, + { "mvdm", 2,2,2,0x7200, 0xFF00, {OP_dmad,OP_MMR}, }, + { "mvdp", 2,2,2,0x7D00, 0xFF00, {OP_Smem,OP_pmad}, FL_SMR }, + { "mvkd", 2,2,2,0x7000, 0xFF00, {OP_dmad,OP_Smem}, }, + { "mvmd", 2,2,2,0x7300, 0xFF00, {OP_MMR,OP_dmad}, }, + { "mvmm", 1,2,2,0xE700, 0xFF00, {OP_MMRX,OP_MMRY}, FL_NR, }, + { "mvpd", 2,2,2,0x7C00, 0xFF00, {OP_pmad,OP_Smem}, }, + { "neg", 1,1,2,0xF484, 0xFCFF, {OP_SRC,OPT|OP_DST}, }, + { "nop", 1,0,0,0xF495, 0xFFFF, {OP_None}, }, + { "norm", 1,1,2,0xF48F, 0xFCFF, {OP_SRC,OPT|OP_DST}, }, + { "or", 1,1,3,0xF0A0, 0xFCE0, {OP_SRC,OPT|OP_SHIFT,OPT|OP_DST}, },/*SRC*/ + { "or", 1,2,2,0x1A00, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "or", 2,2,4,0xF040, 0xFCF0, {OP_lk,OPT|OP_SHFT,OP_SRC,OPT|OP_DST}, }, + { "or", 2,3,4,0xF064, 0xFCFF, {OP_lk,OP_16,OP_SRC,OPT|OP_DST}, }, + { "orm", 2,2,2,0x6900, 0xFF00, {OP_lk,OP_Smem}, FL_NR|FL_SMR, }, + { "poly", 1,1,1,0x3600, 0xFF00, {OP_Smem}, FL_SMR }, + { "popd", 1,1,1,0x8B00, 0xFF00, {OP_Smem}, }, + { "popm", 1,1,1,0x8A00, 0xFF00, {OP_MMR}, }, + { "portr", 2,2,2,0x7400, 0xFF00, {OP_PA,OP_Smem}, }, + { "portw", 2,2,2,0x7500, 0xFF00, {OP_Smem,OP_PA}, FL_SMR }, + { "pshd", 1,1,1,0x4B00, 0xFF00, {OP_Smem}, FL_SMR }, + { "pshm", 1,1,1,0x4A00, 0xFF00, {OP_MMR}, }, + { "ret", 1,0,0,0xFC00, 0xFFFF, {OP_None}, B_RET|FL_NR, }, + { "retd", 1,0,0,0xFE00, 0xFFFF, {OP_None}, B_RET|FL_DELAY|FL_NR, }, + { "rc", 1,1,3,0xFC00, 0xFF00, {OP_CC,OPT|OP_CC,OPT|OP_CC}, + B_RET|FL_NR, }, + { "rcd", 1,1,3,0xFE00, 0xFF00, {OP_CC,OPT|OP_CC,OPT|OP_CC}, + B_RET|FL_DELAY|FL_NR, }, + { "reada", 1,1,1,0x7E00, 0xFF00, {OP_Smem}, }, + { "reset", 1,0,0,0xF7E0, 0xFFFF, {OP_None}, FL_NR, }, + { "rete", 1,0,0,0xF4EB, 0xFFFF, {OP_None}, B_RET|FL_NR, }, + { "reted", 1,0,0,0xF6EB, 0xFFFF, {OP_None}, B_RET|FL_DELAY|FL_NR, }, + { "retf", 1,0,0,0xF49B, 0xFFFF, {OP_None}, B_RET|FL_NR, }, + { "retfd", 1,0,0,0xF69B, 0xFFFF, {OP_None}, B_RET|FL_DELAY|FL_NR, }, + { "rnd", 1,1,2,0xF49F, 0xFCFF, {OP_SRC,OPT|OP_DST}, FL_LP|FL_NR }, + { "rol", 1,1,1,0xF491, 0xFEFF, {OP_SRC1}, }, + { "roltc", 1,1,1,0xF492, 0xFEFF, {OP_SRC1}, }, + { "ror", 1,1,1,0xF490, 0xFEFF, {OP_SRC1}, }, + { "rpt", 1,1,1,0x4700, 0xFF00, {OP_Smem}, B_REPEAT|FL_NR|FL_SMR, }, + { "rpt", 1,1,1,0xEC00, 0xFF00, {OP_k8u}, B_REPEAT|FL_NR, }, + { "rpt", 2,1,1,0xF070, 0xFFFF, {OP_lku}, B_REPEAT|FL_NR, }, + { "rptb", 2,1,1,0xF072, 0xFFFF, {OP_pmad}, FL_NR, }, + { "rptbd", 2,1,1,0xF272, 0xFFFF, {OP_pmad}, FL_DELAY|FL_NR, }, + { "rptz", 2,2,2,0xF071, 0xFEFF, {OP_DST,OP_lku}, B_REPEAT|FL_NR, }, + { "rsbx", 1,1,2,0xF4B0, 0xFDF0, {OPT|OP_N,OP_SBIT}, FL_NR, }, + { "saccd", 1,3,3,0x9E00, 0xFE00, {OP_SRC1,OP_Xmem,OP_CC2}, }, + { "sat", 1,1,1,0xF483, 0xFEFF, {OP_SRC1}, }, + { "sfta", 1,2,3,0xF460, 0xFCE0, {OP_SRC,OP_SHIFT,OPT|OP_DST}, }, + { "sftc", 1,1,1,0xF494, 0xFEFF, {OP_SRC1}, }, + { "sftl", 1,2,3,0xF0E0, 0xFCE0, {OP_SRC,OP_SHIFT,OPT|OP_DST}, }, + { "sqdst", 1,2,2,0xE200, 0xFF00, {OP_Xmem,OP_Ymem}, }, + { "squr", 1,2,2,0xF48D, 0xFEFF, {OP_A,OP_DST}, },/*SRC*/ + { "squr", 1,2,2,0x2600, 0xFE00, {OP_Smem,OP_DST}, FL_SMR }, + { "squra", 1,2,2,0x3800, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "squrs", 1,2,2,0x3A00, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "srccd", 1,2,2,0x9D00, 0xFF00, {OP_Xmem,OP_CC2}, }, + { "ssbx", 1,1,2,0xF5B0, 0xFDF0, {OPT|OP_N,OP_SBIT}, FL_NR, }, + { "st", 1,2,2,0x8C00, 0xFF00, {OP_T,OP_Smem}, }, + { "st", 1,2,2,0x8D00, 0xFF00, {OP_TRN,OP_Smem}, }, + { "st", 2,2,2,0x7600, 0xFF00, {OP_lk,OP_Smem}, }, + { "sth", 1,2,2,0x8200, 0xFE00, {OP_SRC1,OP_Smem}, }, + { "sth", 1,3,3,0x8600, 0xFE00, {OP_SRC1,OP_ASM,OP_Smem}, }, + { "sth", 1,3,3,0x9A00, 0xFE00, {OP_SRC1,OP_SHFT,OP_Xmem}, }, + { "sth", 2,2,3,0x6F00, 0xFF00, {OP_SRC1,OPT|OP_SHIFT,OP_Smem}, + FL_EXT, 0x0C60, 0xFEE0 }, + { "stl", 1,2,2,0x8000, 0xFE00, {OP_SRC1,OP_Smem}, }, + { "stl", 1,3,3,0x8400, 0xFE00, {OP_SRC1,OP_ASM,OP_Smem}, }, + { "stl", 1,3,3,0x9800, 0xFE00, {OP_SRC1,OP_SHFT,OP_Xmem}, }, + { "stl", 2,2,3,0x6F00, 0xFF00, {OP_SRC1,OPT|OP_SHIFT,OP_Smem}, + FL_EXT, 0x0C80, 0xFEE0 }, + { "stlm", 1,2,2,0x8800, 0xFE00, {OP_SRC1,OP_MMR}, }, + { "stm", 2,2,2,0x7700, 0xFF00, {OP_lk,OP_MMR}, }, + { "strcd", 1,2,2,0x9C00, 0xFF00, {OP_Xmem,OP_CC2}, }, + { "sub", 1,1,3,0xF420, 0xFCE0, {OP_SRC,OPT|OP_SHIFT,OPT|OP_DST}, },/*SRC*/ + { "sub", 1,2,3,0xF481, 0xFCFF, {OP_SRC,OP_ASM,OPT|OP_DST}, },/*SRC*/ + { "sub", 1,2,2,0x0800, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "sub", 1,3,3,0x0C00, 0xFE00, {OP_Smem,OP_TS,OP_SRC1}, FL_SMR }, + { "sub", 1,3,4,0x4000, 0xFC00, {OP_Smem,OP_16,OP_SRC,OPT|OP_DST}, FL_SMR }, + { "sub", 1,3,3,0x9200, 0xFE00, {OP_Xmem,OP_SHFT,OP_SRC1}, }, /*PREFER*/ + { "sub", 2,2,4,0x6F00, 0xFF00, {OP_Smem,OPT|OP_SHIFT,OP_SRC,OPT|OP_DST}, + FL_EXT|FL_SMR, 0x0C20, 0xFCE0 }, + { "sub", 1,3,3,0xA200, 0xFE00, {OP_Xmem,OP_Ymem,OP_DST}, }, + { "sub", 2,2,4,0xF010, 0xFCF0, {OP_lk,OPT|OP_SHFT,OP_SRC,OPT|OP_DST}, }, + { "sub", 2,3,4,0xF061, 0xFCFF, {OP_lk,OP_16,OP_SRC,OPT|OP_DST}, }, + { "subb", 1,2,2,0x0E00, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "subc", 1,2,2,0x1E00, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "subs", 1,2,2,0x0A00, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "trap", 1,1,1,0xF4C0, 0xFFE0, {OP_031}, B_BRANCH|FL_NR, }, + { "writa", 1,1,1,0x7F00, 0xFF00, {OP_Smem}, FL_SMR }, + { "xc", 1,2,4,0xFD00, 0xFD00, {OP_12,OP_CC,OPT|OP_CC,OPT|OP_CC}, FL_NR, }, + { "xor", 1,1,3,0xF0C0, 0xFCE0, {OP_SRC,OPT|OP_SHIFT,OPT|OP_DST}, },/*SRC*/ + { "xor", 1,2,2,0x1C00, 0xFE00, {OP_Smem,OP_SRC1}, FL_SMR }, + { "xor", 2,2,4,0xF050, 0xFCF0, {OP_lku,OPT|OP_SHFT,OP_SRC,OPT|OP_DST}, }, + { "xor", 2,3,4,0xF065, 0xFCFF, {OP_lku,OP_16,OP_SRC,OPT|OP_DST}, }, + { "xorm", 2,2,2,0x6A00, 0xFF00, {OP_lku,OP_Smem}, FL_NR|FL_SMR, }, + { NULL, }, +}; + +/* assume all parallel instructions have at least three operands */ +const partemplate tic54x_paroptab[] = { + { "ld","mac", 1,1,2,0xA800, 0xFE00, {OP_Xmem,OP_DST},{OP_Ymem,OPT|OP_RND},}, + { "ld","macr",1,1,2,0xAA00, 0xFE00, {OP_Xmem,OP_DST},{OP_Ymem,OPT|OP_RND},}, + { "ld","mas", 1,1,2,0xAC00, 0xFE00, {OP_Xmem,OP_DST},{OP_Ymem,OPT|OP_RND},}, + { "ld","masr",1,1,2,0xAE00, 0xFE00, {OP_Xmem,OP_DST},{OP_Ymem,OPT|OP_RND},}, + { "st","add", 1,2,2,0xC000, 0xFC00, {OP_SRC,OP_Ymem},{OP_Xmem,OP_DST}, }, + { "st","ld", 1,2,2,0xC800, 0xFC00, {OP_SRC,OP_Ymem},{OP_Xmem,OP_DST}, }, + { "st","ld", 1,2,2,0xE400, 0xFC00, {OP_SRC,OP_Ymem},{OP_Xmem,OP_T}, }, + { "st","mac", 1,2,2,0xD000, 0xFC00, {OP_SRC,OP_Ymem},{OP_Xmem,OP_DST}, }, + { "st","macr",1,2,2,0xD400, 0xFC00, {OP_SRC,OP_Ymem},{OP_Xmem,OP_DST}, }, + { "st","mas", 1,2,2,0xD800, 0xFC00, {OP_SRC,OP_Ymem},{OP_Xmem,OP_DST}, }, + { "st","masr",1,2,2,0xDC00, 0xFC00, {OP_SRC,OP_Ymem},{OP_Xmem,OP_DST}, }, + { "st","mpy", 1,2,2,0xCC00, 0xFC00, {OP_SRC,OP_Ymem},{OP_Xmem,OP_DST}, }, + { "st","sub", 1,2,2,0xC400, 0xFC00, {OP_SRC,OP_Ymem},{OP_Xmem,OP_DST}, }, + { NULL,NULL }, +};